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freedreno/ir3/ra: handle array case for SFU select_reg opt

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The src of the SFU instruction could also be array/reg (non-SSA).
Handle this case too.

The postsched cp pass makes this scenario more likely.

Fixes: cc82521de4 ("freedreno/ir3: round-robin RA")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4440>
This commit is contained in:
Rob Clark
2020-04-03 17:42:05 -07:00
committed by Marge Bot
parent b787b353d0
commit 96ff2a4099
1 changed files with 10 additions and 3 deletions
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13
src/freedreno/ir3/ir3_ra.c
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@@ -478,9 +478,16 @@ ra_select_reg_merged(unsigned int n, BITSET_WORD *regs, void *data)
* for write after read hazards:
*/
struct ir3_instruction *instr = name_to_instr(ctx, n);
if (is_sfu(instr) && instr->regs[1]->instr) {
struct ir3_instruction *src = instr->regs[1]->instr;
unsigned src_n = scalar_name(ctx, src, 0);
if (is_sfu(instr)) {
struct ir3_register *src = instr->regs[1];
int src_n;
if ((src->flags & IR3_REG_ARRAY) && !(src->flags & IR3_REG_RELATIV)) {
struct ir3_array *arr = ir3_lookup_array(ctx->ir, src->array.id);
src_n = arr->base + src->array.offset;
} else {
src_n = scalar_name(ctx, src->instr, 0);
}
unsigned reg = ra_get_node_reg(ctx->g, src_n);