i965: Support relative addressed VS constant reads using the appropriate msg.
The previous support was overly complicated by trying to use the same 1-OWORD message for both offsets.
This commit is contained in:
@@ -897,6 +897,12 @@ void brw_dp_READ_4_vs( struct brw_compile *p,
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GLuint location,
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GLuint location,
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GLuint bind_table_index );
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GLuint bind_table_index );
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void brw_dp_READ_4_vs_relative(struct brw_compile *p,
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struct brw_reg dest,
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struct brw_reg addrReg,
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GLuint offset,
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GLuint bind_table_index);
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void brw_dp_WRITE_16( struct brw_compile *p,
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void brw_dp_WRITE_16( struct brw_compile *p,
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struct brw_reg src,
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struct brw_reg src,
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GLuint scratch_offset );
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GLuint scratch_offset );
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@@ -1290,6 +1290,60 @@ void brw_dp_READ_4_vs(struct brw_compile *p,
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}
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}
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}
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}
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/**
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* Read a float[4] constant per vertex from VS constant buffer, with
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* relative addressing.
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*/
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void brw_dp_READ_4_vs_relative(struct brw_compile *p,
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struct brw_reg dest,
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struct brw_reg addr_reg,
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GLuint offset,
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GLuint bind_table_index)
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{
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struct intel_context *intel = &p->brw->intel;
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int msg_type;
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/* Setup MRF[1] with offset into const buffer */
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brw_push_insn_state(p);
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brw_set_compression_control(p, BRW_COMPRESSION_NONE);
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brw_set_mask_control(p, BRW_MASK_DISABLE);
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brw_set_predicate_control(p, BRW_PREDICATE_NONE);
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/* M1.0 is block offset 0, M1.4 is block offset 1, all other
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* fields ignored.
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*/
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brw_ADD(p, retype(brw_message_reg(1), BRW_REGISTER_TYPE_UD),
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addr_reg, brw_imm_d(offset));
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brw_pop_insn_state(p);
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struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
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insn->header.predicate_control = BRW_PREDICATE_NONE;
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insn->header.compression_control = BRW_COMPRESSION_NONE;
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insn->header.destreg__conditionalmod = 0;
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insn->header.mask_control = BRW_MASK_DISABLE;
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brw_set_dest(insn, dest);
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brw_set_src0(insn, brw_vec8_grf(0, 0));
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if (intel->gen == 6)
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msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
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else if (intel->gen == 5 || intel->is_g4x)
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msg_type = G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
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else
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msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
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brw_set_dp_read_message(p->brw,
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insn,
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bind_table_index,
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BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
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msg_type,
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0, /* source cache = data cache */
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2, /* msg_length */
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1, /* response_length */
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0); /* eot */
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}
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void brw_fb_WRITE(struct brw_compile *p,
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void brw_fb_WRITE(struct brw_compile *p,
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@@ -901,7 +901,6 @@ get_reladdr_constant(struct brw_vs_compile *c,
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const struct prog_src_register *src = &inst->SrcReg[argIndex];
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const struct prog_src_register *src = &inst->SrcReg[argIndex];
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struct brw_compile *p = &c->func;
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struct brw_compile *p = &c->func;
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struct brw_reg const_reg = c->current_const[argIndex].reg;
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struct brw_reg const_reg = c->current_const[argIndex].reg;
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struct brw_reg const2_reg;
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struct brw_reg addrReg = c->regs[PROGRAM_ADDRESS][0];
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struct brw_reg addrReg = c->regs[PROGRAM_ADDRESS][0];
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assert(argIndex < 3);
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assert(argIndex < 3);
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@@ -915,36 +914,12 @@ get_reladdr_constant(struct brw_vs_compile *c,
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#endif
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#endif
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/* fetch the first vec4 */
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/* fetch the first vec4 */
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brw_dp_READ_4_vs(p,
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brw_dp_READ_4_vs_relative(p,
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const_reg, /* writeback dest */
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const_reg, /* writeback dest */
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0, /* oword */
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addrReg, /* address register */
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1, /* relative indexing? */
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16 * src->Index, /* byte offset */
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addrReg, /* address register */
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SURF_INDEX_VERT_CONST_BUFFER /* binding table index */
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16 * src->Index, /* byte offset */
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);
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SURF_INDEX_VERT_CONST_BUFFER /* binding table index */
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);
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/* second vec4 */
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const2_reg = get_tmp(c);
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/* use upper half of address reg for second read */
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addrReg = stride(addrReg, 0, 4, 0);
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addrReg.subnr = 16;
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brw_dp_READ_4_vs(p,
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const2_reg, /* writeback dest */
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1, /* oword */
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1, /* relative indexing? */
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addrReg, /* address register */
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16 * src->Index, /* byte offset */
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SURF_INDEX_VERT_CONST_BUFFER
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);
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/* merge the two Owords into the constant register */
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/* const_reg[7..4] = const2_reg[7..4] */
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brw_MOV(p,
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suboffset(stride(const_reg, 0, 4, 1), 4),
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suboffset(stride(const2_reg, 0, 4, 1), 4));
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release_tmp(c, const2_reg);
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return const_reg;
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return const_reg;
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}
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}
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