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aco/gfx11: allow opsel for VOP12C

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Foz-DB GFX1100:
Totals from 515 (0.38% of 134864) affected shaders:
CodeSize: 2768228 -> 2761076 (-0.26%)
Instrs: 520301 -> 518523 (-0.34%)
Latency: 5190860 -> 5187254 (-0.07%)
InvThroughput: 2120844 -> 2119447 (-0.07%)
Copies: 57238 -> 56101 (-1.99%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22069>
This commit is contained in:
Georg Lehmann
2023-03-21 13:26:19 +01:00
committed by Marge Bot
parent 3907c54443
commit 9650724370
1 changed files with 2 additions and 2 deletions
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4
src/amd/compiler/aco_ir.cpp
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@@ -471,7 +471,8 @@ can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx)
case aco_opcode::v_interp_p10_rtz_f16_f32_inreg: return idx == 0 || idx == 2;
case aco_opcode::v_interp_p2_f16_f32_inreg:
case aco_opcode::v_interp_p2_rtz_f16_f32_inreg: return idx == -1 || idx == 0;
default: return false;
default:
return gfx_level >= GFX11 && (get_gfx11_true16_mask(op) & BITFIELD_BIT(idx == -1 ? 3 : idx));
}
}
@@ -537,7 +538,6 @@ instr_is_16bit(amd_gfx_level gfx_level, aco_opcode op)
/* On GFX11, for some instructions, bit 7 of the destination/operand vgpr is opsel and the field
* only supports v0-v127.
*/
// TODO: take advantage of this functionality in the RA and assembler
uint8_t
get_gfx11_true16_mask(aco_opcode op)
{