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anv,i965: Move CS shared lowering into anv

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Right now, OpenGL uses the GLSL lowering for shared variables and anv
uses NIR to lower them.  For a long time, we've done this weird thing
where we do the NIR lowering unconditionally and then add the SLM sizes
from the two together.  This works because one of them will always be 0
but it's a bit sketchy.  Let's just move the NIR-based lowering into
anv_pipeline and get rid of the sketch.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Jason Ekstrand
2017-08-21 17:41:28 -07:00
parent 725741f10d
commit 95f533d922
2 changed files with 5 additions and 2 deletions
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2
src/intel/compiler/brw_fs.cpp
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@@ -6751,8 +6751,6 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
{ {
nir_shader *shader = nir_shader_clone(mem_ctx, src_shader); nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, true); shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, true);
brw_nir_lower_cs_shared(shader);
prog_data->base.total_shared += shader->num_shared;
/* Now that we cloned the nir_shader, we can update num_uniforms based on /* Now that we cloned the nir_shader, we can update num_uniforms based on
* the thread_local_id_index. * the thread_local_id_index.

5
src/intel/vulkan/anv_pipeline.c
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@@ -381,6 +381,11 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
if (stage != MESA_SHADER_COMPUTE) if (stage != MESA_SHADER_COMPUTE)
NIR_PASS_V(nir, anv_nir_lower_multiview, pipeline->subpass->view_mask); NIR_PASS_V(nir, anv_nir_lower_multiview, pipeline->subpass->view_mask);
if (stage == MESA_SHADER_COMPUTE) {
NIR_PASS_V(nir, brw_nir_lower_cs_shared);
prog_data->total_shared = nir->num_shared;
}
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
/* Figure out the number of parameters */ /* Figure out the number of parameters */