asahi: make GS inputs explicit
we don't want to assume VS->GS, since we want to reuse the root uniforms across the whole draw with honeykrisp tess+gs. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382>
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@@ -209,9 +209,21 @@ agx_load_per_vertex_input(nir_builder *b, nir_intrinsic_instr *intr,
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assert(intr->intrinsic == nir_intrinsic_load_per_vertex_input);
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nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
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nir_def *addr = libagx_vertex_output_address(
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b, nir_load_vs_output_buffer_agx(b), nir_load_vs_outputs_agx(b), vertex,
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nir_iadd_imm(b, intr->src[1].ssa, sem.location));
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nir_def *location = nir_iadd_imm(b, intr->src[1].ssa, sem.location);
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nir_def *addr;
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if (b->shader->info.stage == MESA_SHADER_GEOMETRY) {
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/* GS may be preceded by VS or TES so specified as param */
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addr = libagx_geometry_input_address(
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b, nir_load_geometry_param_buffer_agx(b), vertex, location);
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} else {
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assert(b->shader->info.stage == MESA_SHADER_TESS_CTRL);
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/* TCS always preceded by VS so we use the VS state directly */
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addr = libagx_vertex_output_address(b, nir_load_vs_output_buffer_agx(b),
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nir_load_vs_outputs_agx(b), vertex,
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location);
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}
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addr = nir_iadd_imm(b, addr, 4 * nir_intrinsic_component(intr));
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return nir_load_global_constant(b, addr, 4, intr->def.num_components,
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@@ -544,9 +544,12 @@ libagx_gs_setup_indirect(global struct agx_gs_setup_indirect_params *gsi,
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state->heap_bottom +=
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align(p->input_primitives * p->count_buffer_stride, 16);
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*(gsi->vertex_buffer) = (uintptr_t)(state->heap + state->heap_bottom);
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p->input_buffer = (uintptr_t)(state->heap + state->heap_bottom);
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*(gsi->vertex_buffer) = p->input_buffer;
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state->heap_bottom += align(vertex_buffer_size, 4);
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p->input_mask = gsi->vs_outputs;
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if (state->heap_bottom > state->heap_size) {
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global uint *foo = (global uint *)(uintptr_t)0x1deadbeef;
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*foo = 0x1234;
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@@ -665,6 +668,14 @@ libagx_vertex_output_address(uintptr_t buffer, uint64_t mask, uint vtx,
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return buffer + libagx_tcs_in_offs(vtx, location, mask);
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}
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uintptr_t
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libagx_geometry_input_address(constant struct agx_geometry_params *p, uint vtx,
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gl_varying_slot location)
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{
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return libagx_vertex_output_address(p->input_buffer, p->input_mask, vtx,
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location);
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}
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unsigned
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libagx_input_vertices(constant struct agx_ia_state *ia)
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{
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@@ -163,6 +163,13 @@ struct agx_geometry_params {
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*/
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GLOBAL(uchar) xfb_base[MAX_SO_BUFFERS];
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/* Address and present mask for the input to the geometry shader. These will
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* reflect the vertex shader for VS->GS or instead the tessellation
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* evaluation shader for TES->GS.
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*/
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uint64_t input_buffer;
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uint64_t input_mask;
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/* Location-indexed mask of flat outputs, used for lowering GL edge flags. */
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uint64_t flat_outputs;
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@@ -201,7 +208,7 @@ struct agx_geometry_params {
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*/
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uint32_t input_topology;
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} PACKED;
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AGX_STATIC_ASSERT(sizeof(struct agx_geometry_params) == 78 * 4);
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AGX_STATIC_ASSERT(sizeof(struct agx_geometry_params) == 82 * 4);
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/* TCS shared memory layout:
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*
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@@ -4003,6 +4003,7 @@ agx_batch_geometry_params(struct agx_batch *batch, uint64_t input_index_buffer,
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*/
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unsigned count_buffer_stride = batch->ctx->gs->gs_count_words * 4;
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batch->uniforms.vertex_outputs = batch->ctx->vs->b.info.outputs;
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params.input_mask = batch->uniforms.vertex_outputs;
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if (indirect) {
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params.count_buffer_stride = count_buffer_stride;
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@@ -4032,6 +4033,8 @@ agx_batch_geometry_params(struct agx_batch *batch, uint64_t input_index_buffer,
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uint64_t addr = agx_pool_alloc_aligned(&batch->pool, vb_size, 4).gpu;
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batch->uniforms.vertex_output_buffer_ptr =
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agx_pool_upload(&batch->pool, &addr, 8);
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params.input_buffer = addr;
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}
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}
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