intel/ds: Track CCS cache flush bit

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
This commit is contained in:
Sagar Ghuge
2023-06-22 10:46:22 -07:00
parent 5a272b5ed8
commit 957d7644aa
5 changed files with 7 additions and 2 deletions

View File

@@ -307,7 +307,7 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage
auto data = event->add_extra_data();
data->set_name("stall_reason");
snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s",
snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s : %s",
(payload->flags & INTEL_DS_DEPTH_CACHE_FLUSH_BIT) ? "+depth_flush" : "",
(payload->flags & INTEL_DS_DATA_CACHE_FLUSH_BIT) ? "+dc_flush" : "",
(payload->flags & INTEL_DS_HDC_PIPELINE_FLUSH_BIT) ? "+hdc_flush" : "",
@@ -324,6 +324,7 @@ custom_trace_payload_as_extra_end_stall(perfetto::protos::pbzero::GpuRenderStage
(payload->flags & INTEL_DS_CS_STALL_BIT) ? "+cs_stall" : "",
(payload->flags & INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT) ? "+udp_flush" : "",
(payload->flags & INTEL_DS_END_OF_PIPE_BIT) ? "+eop" : "",
(payload->flags & INTEL_DS_CCS_CACHE_FLUSH_BIT) ? "+ccs_flush" : "",
payload->reason ? payload->reason : "unknown");
assert(strlen(buf) > 0);

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@@ -58,6 +58,7 @@ enum intel_ds_stall_flag {
INTEL_DS_UNTYPED_DATAPORT_CACHE_FLUSH_BIT = BITFIELD_BIT(13),
INTEL_DS_PSS_STALL_SYNC_BIT = BITFIELD_BIT(14),
INTEL_DS_END_OF_PIPE_BIT = BITFIELD_BIT(15),
INTEL_DS_CCS_CACHE_FLUSH_BIT = BITFIELD_BIT(16),
};
/* Convert internal driver PIPE_CONTROL stall bits to intel_ds_stall_flag. */

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@@ -210,7 +210,8 @@ def define_tracepoints(args):
['CS_STALL', 'cs_stall'],
['UNTYPED_DATAPORT_CACHE_FLUSH', 'udp_flush'],
['PSS_STALL_SYNC', 'pss_stall'],
['END_OF_PIPE', 'eop']]
['END_OF_PIPE', 'eop'],
['CCS_CACHE_FLUSH', 'ccs_flush']]
begin_end_tp('stall',
tp_args=[ArgStruct(type='uint32_t', var='flags'),