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nir: Fix divergence analysis of load_patch_vertices_in.

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load_patch_vertices_in can only occur in tessellation shaders,
and contains the number of vertices in an input patch.

* TCS: patch_vertices_in is equal to the input patch size
* TES: patch_vertices_in is equal to the TCS output patch size

The patch sizes may be set by a pipeline or dynamic states,
however in both cases it is definitely uniform within a subgroup.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27680>
This commit is contained in:
Timur Kristóf
2024-02-08 11:56:36 +01:00
committed by Marge Bot
parent 537c0029dd
commit 9553d67373
1 changed files with 1 additions and 6 deletions
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7
src/compiler/nir/nir_divergence_analysis.c
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@@ -162,6 +162,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr,
case nir_intrinsic_load_num_vertices:
case nir_intrinsic_load_fb_layers_v3d:
case nir_intrinsic_load_tcs_num_patches_amd:
case nir_intrinsic_load_patch_vertices_in:
case nir_intrinsic_load_ring_tess_factors_amd:
case nir_intrinsic_load_ring_tess_offchip_amd:
case nir_intrinsic_load_ring_tess_factors_offset_amd:
@@ -350,12 +351,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr,
else
unreachable("Invalid stage for load_primitive_tess_level_*");
break;
case nir_intrinsic_load_patch_vertices_in:
if (stage == MESA_SHADER_TESS_EVAL)
is_divergent = !(options & nir_divergence_single_patch_per_tes_subgroup);
else
assert(stage == MESA_SHADER_TESS_CTRL);
break;
case nir_intrinsic_load_workgroup_index:
case nir_intrinsic_load_workgroup_id: