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nir/opt_barrier: Generalize to control barriers

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For GLSL, we want to optimize code like

   memoryBarrierBuffer();
   controlBarrier();

into a single scoped_barrier intrinsic for the backend to consume. Now that
backends can get scoped_barriers everywhere, what's left is enabling backends to
combine these barriers together. We already have an Intel-specific pass for
combining memory barriers; it just needs a teensy bit of generalization to allow
combining all sorts of barriers together.

This avoids code quality regression on Asahi when switching to purely scoped
barriers. It's probably useful for other backends too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21661>
This commit is contained in:
Alyssa Rosenzweig
2023-03-02 13:30:47 -05:00
committed by Marge Bot
parent 83fd7a5ed1
commit 952bd63d6d
3 changed files with 20 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
src/intel/compiler/brw_nir.c
View File

@@ -1243,10 +1243,15 @@ brw_nir_should_vectorize_mem(unsigned align_mul, unsigned align_offset,
}
static
bool combine_all_barriers(nir_intrinsic_instr *a,
nir_intrinsic_instr *b,
void *data)
bool combine_all_memory_barriers(nir_intrinsic_instr *a,
nir_intrinsic_instr *b,
void *data)
{
/* Only combine pure memory barriers */
if ((nir_intrinsic_execution_scope(a) != NIR_SCOPE_NONE) ||
(nir_intrinsic_execution_scope(b) != NIR_SCOPE_NONE))
return false;
/* Translation to backend IR will get rid of modes we don't care about, so
* no harm in always combining them.
*
@@ -1418,7 +1423,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
OPT(nir_lower_bit_size, lower_bit_size_callback, (void *)compiler);
OPT(brw_nir_lower_scoped_barriers);
OPT(nir_opt_combine_memory_barriers, combine_all_barriers, NULL);
OPT(nir_opt_combine_barriers, combine_all_memory_barriers, NULL);
do {
progress = false;