freedreno/a6xx: Move tess-bo emit

Move this to where the rest of the hs/ds params are emit, because for
a7xx with load_shader_consts_via_preamble we'll need this all to be a
single UBO.  So we won't be able to piecemeal upload consts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31534>
This commit is contained in:
Rob Clark
2024-10-03 08:53:13 -07:00
committed by Marge Bot
parent efb93c9f52
commit 94c3c39f21
2 changed files with 22 additions and 36 deletions

View File

@@ -107,7 +107,6 @@ struct fd_ringbuffer *
fd6_build_tess_consts(struct fd6_emit *emit)
{
struct fd_context *ctx = emit->ctx;
struct fd_ringbuffer *constobj = fd_submit_new_ringbuffer(
ctx->batch->submit, 0x1000, FD_RINGBUFFER_STREAMING);
@@ -126,10 +125,22 @@ fd6_build_tess_consts(struct fd6_emit *emit)
emit_stage_tess_consts(constobj, emit->vs, vs_params, ARRAY_SIZE(vs_params));
if (emit->hs) {
uint32_t hs_params[4] = {
struct fd_bo *tess_bo = ctx->screen->tess_bo;
int64_t tess_factor_iova = fd_bo_get_iova(tess_bo);
int64_t tess_param_iova = tess_factor_iova + FD6_TESS_FACTOR_SIZE;
fd_ringbuffer_attach_bo(constobj, tess_bo);
uint32_t hs_params[8] = {
emit->vs->output_size * num_vertices * 4, /* vs primitive stride */
emit->vs->output_size * 4, /* vs vertex stride */
emit->hs->output_size, ctx->patch_vertices};
emit->hs->output_size,
ctx->patch_vertices,
tess_param_iova,
tess_param_iova >> 32,
tess_factor_iova,
tess_factor_iova >> 32,
};
emit_stage_tess_consts(constobj, emit->hs, hs_params,
ARRAY_SIZE(hs_params));
@@ -137,11 +148,16 @@ fd6_build_tess_consts(struct fd6_emit *emit)
if (emit->gs)
num_vertices = emit->gs->gs.vertices_in;
uint32_t ds_params[4] = {
uint32_t ds_params[8] = {
emit->ds->output_size * num_vertices * 4, /* ds primitive stride */
emit->ds->output_size * 4, /* ds vertex stride */
emit->hs->output_size, /* hs vertex stride (dwords) */
emit->hs->tess.tcs_vertices_out};
emit->hs->output_size, /* hs vertex stride (dwords) */
emit->hs->tess.tcs_vertices_out,
tess_param_iova,
tess_param_iova >> 32,
tess_factor_iova,
tess_factor_iova >> 32,
};
emit_stage_tess_consts(constobj, emit->ds, ds_params,
ARRAY_SIZE(ds_params));

View File

@@ -466,31 +466,6 @@ next_regid(uint32_t reg, uint32_t increment)
return regid(63, 0);
}
static void
fd6_emit_tess_bos(struct fd_screen *screen, struct fd_ringbuffer *ring,
const struct ir3_shader_variant *s) assert_dt
{
const struct ir3_const_state *const_state = ir3_const_state(s);
const unsigned regid = const_state->offsets.primitive_param + 1;
uint32_t dwords = 8;
if (regid >= s->constlen)
return;
fd_ringbuffer_attach_bo(ring, screen->tess_bo);
OUT_PKT7(ring, fd6_stage2opcode(s->type), 7);
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(regid) |
CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) |
CP_LOAD_STATE6_0_STATE_SRC(SS6_DIRECT) |
CP_LOAD_STATE6_0_STATE_BLOCK(fd6_stage2shadersb(s->type)) |
CP_LOAD_STATE6_0_NUM_UNIT(dwords / 4));
OUT_RING(ring, 0);
OUT_RING(ring, 0);
OUT_RELOC(ring, screen->tess_bo, FD6_TESS_FACTOR_SIZE, 0, 0);
OUT_RELOC(ring, screen->tess_bo, 0, 0, 0);
}
static enum a6xx_tess_output
primitive_to_tess(enum mesa_prim primitive)
{
@@ -1191,11 +1166,6 @@ setup_stateobj(struct fd_ringbuffer *ring, const struct program_builder *b)
emit_fs_inputs<CHIP>(ring, b);
emit_fs_outputs(ring, b);
if (b->hs) {
fd6_emit_tess_bos(b->ctx->screen, ring, b->hs);
fd6_emit_tess_bos(b->ctx->screen, ring, b->ds);
}
if (b->hs) {
uint32_t patch_control_points = b->key->patch_vertices;