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aco: improve printing of s_delay_alu

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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23213>
This commit is contained in:
Rhys Perry
2023-05-24 16:24:35 +01:00
committed by Marge Bot
parent 54c0088629
commit 94958e637d
3 changed files with 41 additions and 15 deletions
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15
src/amd/compiler/aco_builder_h.py
View File

@@ -136,6 +136,21 @@ enum bperm_swiz {
bperm_255 = 13, bperm_255 = 13,
}; };
enum class alu_delay_wait {
NO_DEP = 0,
VALU_DEP_1 = 1,
VALU_DEP_2 = 2,
VALU_DEP_3 = 3,
VALU_DEP_4 = 4,
TRANS32_DEP_1 = 5,
TRANS32_DEP_2 = 6,
TRANS32_DEP_3 = 7,
FMA_ACCUM_CYCLE_1 = 8,
SALU_CYCLE_1 = 9,
SALU_CYCLE_2 = 10,
SALU_CYCLE_3 = 11,
};
class Builder { class Builder {
public: public:
struct Result { struct Result {

16
src/amd/compiler/aco_insert_waitcnt.cpp
View File

@@ -22,6 +22,7 @@
* *
*/ */
#include "aco_builder.h"
#include "aco_ir.h" #include "aco_ir.h"
#include "common/sid.h" #include "common/sid.h"
@@ -167,21 +168,6 @@ struct alu_delay_info {
} }
}; };
enum class alu_delay_wait {
NO_DEP,
VALU_DEP_1,
VALU_DEP_2,
VALU_DEP_3,
VALU_DEP_4,
TRANS32_DEP_1,
TRANS32_DEP_2,
TRANS32_DEP_3,
FMA_ACCUM_CYCLE_1,
SALU_CYCLE_1,
SALU_CYCLE_2,
SALU_CYCLE_3
};
uint8_t uint8_t
get_counters_for_event(wait_event ev) get_counters_for_event(wait_event ev)
{ {

25
src/amd/compiler/aco_print_ir.cpp
View File

@@ -322,6 +322,31 @@ print_instr_format_specific(enum amd_gfx_level gfx_level, const Instruction* ins
fprintf(output, " sa_sdst(%d)", sa_sdst); fprintf(output, " sa_sdst(%d)", sa_sdst);
break; break;
} }
case aco_opcode::s_delay_alu: {
unsigned delay[2] = {imm & 0xfu, (imm >> 7) & 0xfu};
unsigned skip = (imm >> 4) & 0x3;
for (unsigned i = 0; i < 2; i++) {
if (i == 1 && skip) {
if (skip == 1)
fprintf(output, " next");
else
fprintf(output, " skip_%u", skip - 1);
}
alu_delay_wait wait = (alu_delay_wait)delay[i];
if (wait >= alu_delay_wait::VALU_DEP_1 && wait <= alu_delay_wait::VALU_DEP_4)
fprintf(output, " valu_dep_%u", delay[i]);
else if (wait >= alu_delay_wait::TRANS32_DEP_1 && wait <= alu_delay_wait::TRANS32_DEP_3)
fprintf(output, " trans32_dep_%u",
delay[i] - (unsigned)alu_delay_wait::TRANS32_DEP_1 + 1);
else if (wait == alu_delay_wait::FMA_ACCUM_CYCLE_1)
fprintf(output, " fma_accum_cycle_1");
else if (wait >= alu_delay_wait::SALU_CYCLE_1 && wait <= alu_delay_wait::SALU_CYCLE_3)
fprintf(output, " salu_cycle_%u",
delay[i] - (unsigned)alu_delay_wait::SALU_CYCLE_1 + 1);
}
break;
}
case aco_opcode::s_endpgm: case aco_opcode::s_endpgm:
case aco_opcode::s_endpgm_saved: case aco_opcode::s_endpgm_saved:
case aco_opcode::s_endpgm_ordered_ps_done: case aco_opcode::s_endpgm_ordered_ps_done: