iris: expand pre-hiz data cache flush to gfx >= 125
Cc: mesa-stable Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27132>
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@@ -703,7 +703,7 @@ iris_hiz_exec(struct iris_context *ice,
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/* A data cache flush is not suggested by HW docs, but we found it to fix
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* a number of failures.
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*/
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unsigned wa_flush = intel_device_info_is_dg2(batch->screen->devinfo) &&
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unsigned wa_flush = devinfo->verx10 >= 125 &&
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res->aux.usage == ISL_AUX_USAGE_HIZ_CCS ?
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PIPE_CONTROL_DATA_CACHE_FLUSH : 0;
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