pan/mdg: eliminate references to ins->texture.op
This commit makes the `ins->op` the correct field to use with texture instructions. Signed-off-by: Italo Nicola <italonicola@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5933>
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@@ -1600,9 +1600,8 @@ emit_control_barrier(compiler_context *ctx)
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.type = TAG_TEXTURE_4,
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.dest = ~0,
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.src = { ~0, ~0, ~0, ~0 },
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.op = TEXTURE_OP_BARRIER,
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.texture = {
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.op = TEXTURE_OP_BARRIER,
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/* TODO: optimize */
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.out_of_order = MIDGARD_BARRIER_BUFFER |
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MIDGARD_BARRIER_SHARED ,
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@@ -2094,8 +2093,8 @@ emit_texop_native(compiler_context *ctx, nir_tex_instr *instr,
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.dest_type = dest_type,
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.swizzle = SWIZZLE_IDENTITY_4,
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.outmod = outmod,
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.op = midgard_texop,
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.texture = {
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.op = midgard_texop,
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.format = midgard_tex_format(instr->sampler_dim),
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.texture_handle = texture_index,
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.sampler_handle = sampler_index,
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@@ -106,8 +106,8 @@ midgard_emit_derivatives(compiler_context *ctx, nir_alu_instr *instr)
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.src = { ~0, nir_src_index(ctx, &instr->src[0].src), ~0, ~0 },
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.swizzle = SWIZZLE_IDENTITY_4,
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.src_types = { nir_type_float32, nir_type_float32 },
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.op = mir_derivative_op(instr->op),
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.texture = {
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.op = mir_derivative_op(instr->op),
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.format = MALI_TEX_2D,
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.in_reg_full = 1,
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.out_full = 1,
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@@ -126,7 +126,7 @@ midgard_lower_derivatives(compiler_context *ctx, midgard_block *block)
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{
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mir_foreach_instr_in_block_safe(block, ins) {
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if (ins->type != TAG_TEXTURE_4) continue;
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if (!OP_IS_DERIVATIVE(ins->texture.op)) continue;
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if (!OP_IS_DERIVATIVE(ins->op)) continue;
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/* Check if we need to split */
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@@ -487,6 +487,14 @@ mir_lower_roundmode(midgard_instruction *ins)
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}
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}
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static midgard_texture_word
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texture_word_from_instr(midgard_instruction *ins)
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{
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midgard_texture_word tex = ins->texture;
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tex.op = ins->op;
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return tex;
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}
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static midgard_vector_alu
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vector_alu_from_instr(midgard_instruction *ins)
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{
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@@ -673,7 +681,7 @@ emit_binary_bundle(compiler_context *ctx,
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ins->texture.next_type = next_tag;
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/* Nothing else to pack for barriers */
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if (ins->texture.op == TEXTURE_OP_BARRIER) {
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if (ins->op == TEXTURE_OP_BARRIER) {
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ins->texture.cont = ins->texture.last = 1;
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util_dynarray_append(emission, midgard_texture_word, ins->texture);
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return;
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@@ -702,14 +710,15 @@ emit_binary_bundle(compiler_context *ctx,
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ins->texture.sampler_type = midgard_sampler_type(ins->dest_type);
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ins->texture.outmod = ins->outmod;
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if (mir_op_computes_derivatives(ctx->stage, ins->texture.op)) {
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if (mir_op_computes_derivatives(ctx->stage, ins->op)) {
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ins->texture.cont = !ins->helper_terminate;
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ins->texture.last = ins->helper_terminate || ins->helper_execute;
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} else {
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ins->texture.cont = ins->texture.last = 1;
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}
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util_dynarray_append(emission, midgard_texture_word, ins->texture);
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midgard_texture_word texture = texture_word_from_instr(ins);
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util_dynarray_append(emission, midgard_texture_word, texture);
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break;
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}
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@@ -68,7 +68,7 @@ mir_block_uses_helpers(gl_shader_stage stage, midgard_block *block)
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{
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mir_foreach_instr_in_block(block, ins) {
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if (ins->type != TAG_TEXTURE_4) continue;
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if (mir_op_computes_derivatives(stage, ins->texture.op))
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if (mir_op_computes_derivatives(stage, ins->op))
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return true;
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}
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@@ -151,7 +151,7 @@ mir_analyze_helper_terminate(compiler_context *ctx)
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mir_foreach_instr_in_block_rev(block, ins) {
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if (ins->type != TAG_TEXTURE_4) continue;
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if (!mir_op_computes_derivatives(ctx->stage, ins->texture.op)) continue;
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if (!mir_op_computes_derivatives(ctx->stage, ins->op)) continue;
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ins->helper_terminate = true;
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break;
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@@ -197,7 +197,7 @@ mir_analyze_helper_requirements(compiler_context *ctx)
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mir_foreach_instr_global(ctx, ins) {
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if (ins->type != TAG_TEXTURE_4) continue;
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if (ins->dest >= ctx->temp_count) continue;
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if (!mir_op_computes_derivatives(ctx->stage, ins->texture.op)) continue;
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if (!mir_op_computes_derivatives(ctx->stage, ins->op)) continue;
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mir_foreach_src(ins, s) {
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if (ins->src[s] < temp_count)
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@@ -60,7 +60,7 @@ can_dce(midgard_instruction *ins)
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return false;
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if (ins->type == TAG_TEXTURE_4)
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if (ins->texture.op == TEXTURE_OP_BARRIER)
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if (ins->op == TEXTURE_OP_BARRIER)
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return false;
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return true;
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@@ -755,7 +755,7 @@ install_registers_instr(
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}
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case TAG_TEXTURE_4: {
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if (ins->texture.op == TEXTURE_OP_BARRIER)
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if (ins->op == TEXTURE_OP_BARRIER)
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break;
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/* Grab RA results */
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@@ -970,9 +970,9 @@ mir_schedule_texture(
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mir_update_worklist(worklist, len, instructions, ins);
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struct midgard_bundle out = {
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.tag = ins->texture.op == TEXTURE_OP_BARRIER ?
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.tag = ins->op == TEXTURE_OP_BARRIER ?
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TAG_TEXTURE_4_BARRIER :
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(ins->texture.op == TEXTURE_OP_TEXEL_FETCH) || is_vertex ?
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(ins->op == TEXTURE_OP_TEXEL_FETCH) || is_vertex ?
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TAG_TEXTURE_4_VTX : TAG_TEXTURE_4,
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.instruction_count = 1,
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.instructions = { ins }
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