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intel: Sync xe_drm.h

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My second attempt at a minimally invasive reshuffle of the uAPI,
this time only forcibly aligning structures to 32-bits or 64-bits
depending on the members which follow, so that 64-bit userspace
is identical to the current unmerged kernel module, and the 32-bit
compat userspace aligns with that, and functions rather than
crashing.

Should work just fine with the current drm-xe-next Git tree, which
is rebased on 6.3.0-1, with a few extra changes, as of this commit.

Based on commit 2cd469458fcc24c5f345ad39721a1aedaf70ec0f ("drm/xe: Add explicit padding to uAPI definition")

Signed-off-by: Christopher Snowhill <kode54@gmail.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22652>
This commit is contained in:
Christopher Snowhill
2023-05-05 21:50:47 -07:00
committed by Marge Bot
parent 264cf37348
commit 92a7cba4f2
1 changed files with 33 additions and 1 deletions
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34
include/drm-uapi/xe_drm.h
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@@ -91,7 +91,7 @@ struct xe_user_extension {
*/
__u32 name;
/**
* @flags: MBZ
* @pad: MBZ
*
* All undefined bits must be zero.
*/
@@ -291,6 +291,9 @@ struct drm_xe_gem_create {
*/
__u32 handle;
/** @pad: MBZ */
__u32 pad;
/** @reserved: Reserved */
__u64 reserved[2];
};
@@ -335,6 +338,9 @@ struct drm_xe_ext_vm_set_property {
#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
__u32 property;
/** @pad: MBZ */
__u32 pad;
/** @value: property value */
__u64 value;
@@ -379,6 +385,9 @@ struct drm_xe_vm_bind_op {
*/
__u32 obj;
/** @pad: MBZ */
__u32 pad;
union {
/**
* @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
@@ -469,6 +478,9 @@ struct drm_xe_vm_bind {
/** @num_binds: number of binds in this IOCTL */
__u32 num_binds;
/** @pad: MBZ */
__u32 pad;
union {
/** @bind: used if num_binds == 1 */
struct drm_xe_vm_bind_op bind;
@@ -482,6 +494,9 @@ struct drm_xe_vm_bind {
/** @num_syncs: amount of syncs to wait on */
__u32 num_syncs;
/** @pad2: MBZ */
__u32 pad2;
/** @syncs: pointer to struct drm_xe_sync array */
__u64 syncs;
@@ -497,6 +512,9 @@ struct drm_xe_ext_engine_set_property {
/** @property: property to set */
__u32 property;
/** @pad: MBZ */
__u32 pad;
/** @value: property value */
__u64 value;
};
@@ -612,6 +630,9 @@ struct drm_xe_sync {
#define DRM_XE_SYNC_USER_FENCE 0x3
#define DRM_XE_SYNC_SIGNAL 0x10
/** @pad: MBZ */
__u32 pad;
union {
__u32 handle;
/**
@@ -656,6 +677,9 @@ struct drm_xe_exec {
*/
__u16 num_batch_buffer;
/** @pad: MBZ */
__u16 pad[3];
/** @reserved: Reserved */
__u64 reserved[2];
};
@@ -718,6 +742,8 @@ struct drm_xe_wait_user_fence {
#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
__u16 flags;
/** @pad: MBZ */
__u32 pad;
/** @value: compare value */
__u64 value;
/** @mask: comparison mask */
@@ -750,6 +776,9 @@ struct drm_xe_vm_madvise {
/** @vm_id: The ID VM in which the VMA exists */
__u32 vm_id;
/** @pad: MBZ */
__u32 pad;
/** @range: Number of bytes in the VMA */
__u64 range;
@@ -794,6 +823,9 @@ struct drm_xe_vm_madvise {
/** @property: property to set */
__u32 property;
/** @pad2: MBZ */
__u32 pad2;
/** @value: property value */
__u64 value;