intel/eu: Don't validate LSC transpose on ops that don't have it
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11991>
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@@ -1168,6 +1168,12 @@ lsc_opcode_has_cmask(enum lsc_opcode opcode)
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return opcode == LSC_OP_LOAD_CMASK || opcode == LSC_OP_STORE_CMASK;
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return opcode == LSC_OP_LOAD_CMASK || opcode == LSC_OP_STORE_CMASK;
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}
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}
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static inline bool
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lsc_opcode_has_transpose(enum lsc_opcode opcode)
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{
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return opcode == LSC_OP_LOAD || opcode == LSC_OP_STORE;
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}
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static inline uint32_t
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static inline uint32_t
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lsc_data_size_bytes(enum lsc_data_size data_size)
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lsc_data_size_bytes(enum lsc_data_size data_size)
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{
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{
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@@ -1252,6 +1258,8 @@ lsc_msg_desc(UNUSED const struct intel_device_info *devinfo,
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DIV_ROUND_UP(lsc_addr_size_bytes(addr_sz) * num_coordinates * simd_size,
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DIV_ROUND_UP(lsc_addr_size_bytes(addr_sz) * num_coordinates * simd_size,
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REG_SIZE);
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REG_SIZE);
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assert(!transpose || lsc_opcode_has_transpose(opcode));
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unsigned msg_desc =
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unsigned msg_desc =
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SET_BITS(opcode, 5, 0) |
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SET_BITS(opcode, 5, 0) |
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SET_BITS(addr_sz, 8, 7) |
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SET_BITS(addr_sz, 8, 7) |
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@@ -2054,7 +2054,8 @@ send_descriptor_restrictions(const struct intel_device_info *devinfo,
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case GFX12_SFID_UGM:
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case GFX12_SFID_UGM:
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ERROR_IF(!devinfo->has_lsc, "Platform does not support LSC");
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ERROR_IF(!devinfo->has_lsc, "Platform does not support LSC");
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ERROR_IF(lsc_msg_desc_transpose(devinfo, desc) &&
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ERROR_IF(lsc_opcode_has_transpose(lsc_msg_desc_opcode(devinfo, desc)) &&
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lsc_msg_desc_transpose(devinfo, desc) &&
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brw_inst_exec_size(devinfo, inst) != BRW_EXECUTE_1,
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brw_inst_exec_size(devinfo, inst) != BRW_EXECUTE_1,
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"Transposed vectors are restricted to Exec_Mask = 1.");
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"Transposed vectors are restricted to Exec_Mask = 1.");
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break;
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break;
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