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nir: Move lower_usub_sat64 to nir_lower_int64_options.

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Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15421>
This commit is contained in:
Georg Lehmann
2022-01-17 18:11:27 +01:00
committed by Marge Bot
parent 01fad6aa72
commit 922916bf64
3 changed files with 3 additions and 12 deletions
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11
src/compiler/nir/nir.h
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@@ -3147,6 +3147,7 @@ typedef enum {
nir_lower_scan_reduce_bitwise64 = (1 << 17),
nir_lower_scan_reduce_iadd64 = (1 << 18),
nir_lower_vote_ieq64 = (1 << 19),
nir_lower_usub_sat64 = (1 << 20),
} nir_lower_int64_options;
typedef enum {
@@ -3387,19 +3388,9 @@ typedef struct nir_shader_compiler_options {
*
* If this flag is set, the lowering will be applied to all bit-sizes of
* these instructions.
*
* \sa ::lower_usub_sat64
*/
bool lower_uadd_sat;
/**
* Set if only 64-bit nir_op_usub_sat should be lowered to simple
* arithmetic.
*
* \sa ::lower_add_sat
*/
bool lower_usub_sat64;
/**
* Set if nir_op_iadd_sat and nir_op_isub_sat should be lowered to simple
* arithmetic.

2
src/compiler/nir/nir_opt_algebraic.py
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@@ -1670,7 +1670,7 @@ optimizations.extend([
(('uadd_sat@64', a, b), ('bcsel', ('ult', ('iadd', a, b), a), -1, ('iadd', a, b)), 'options->lower_uadd_sat || (options->lower_int64_options & nir_lower_iadd64) != 0'),
(('uadd_sat', a, b), ('bcsel', ('ult', ('iadd', a, b), a), -1, ('iadd', a, b)), 'options->lower_uadd_sat'),
(('usub_sat', a, b), ('bcsel', ('ult', a, b), 0, ('isub', a, b)), 'options->lower_uadd_sat'),
(('usub_sat@64', a, b), ('bcsel', ('ult', a, b), 0, ('isub', a, b)), 'options->lower_usub_sat64 || (options->lower_int64_options & nir_lower_iadd64) != 0'),
(('usub_sat@64', a, b), ('bcsel', ('ult', a, b), 0, ('isub', a, b)), '(options->lower_int64_options & nir_lower_usub_sat64) != 0'),
# int64_t sum = a + b;
#

2
src/intel/compiler/brw_compiler.c
View File

@@ -65,7 +65,6 @@
.lower_unpack_snorm_4x8 = true, \
.lower_unpack_unorm_2x16 = true, \
.lower_unpack_unorm_4x8 = true, \
.lower_usub_sat64 = true, \
.lower_hadd64 = true, \
.avoid_ternary_with_two_constants = true, \
.has_pack_32_4x8 = true, \
@@ -165,6 +164,7 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
bool is_scalar = compiler->scalar_stage[i];
if (is_scalar) {
*nir_options = scalar_nir_options;
int64_options |= nir_lower_usub_sat64;
} else {
*nir_options = vector_nir_options;
}