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v3d,v3dv: stop trying to force 16-bit TMU output for shadow comparisons

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In V3D we were doing this incorrectly by peeking into the sampler state
unconditionally, which is not correct if the TMU operations don't use
sampler state at all (like PBOs). This was causing us to fail the second
test in this sequence when both tests run back back to back in the same
process:

dEQP-GLES3.functional.texture.shadow.2d.linear.greater_or_equal_depth_component32f
dEQP-GLES3.functional.texture.specification.teximage2d_pbo.rg32f_cube

Here, the first test would setup sampler state for shadow comparisons and
the second test would setup a PBO upload, which would incorrectly pick
up the sampler state to decide about the TMU output size for the PBO
operation.

In V3DV we were doing this right looking through each texture/sampler
instruction and checking if they all involved shadow comparisons or had
relaxed precission, defaulting to 32-bit otherwise.

This special-casing for shadow comparisons also leaks from drivers
into the compiler where we are forced to emit some pieces of sampler
state for 32-bit outputs, so we had to special-case shadow instructions
there as well and we also had a fix for CS textures not having correct
sampler state representing shadow operations too. Finally,
we also had  at least a couple of bugs where forcing 32-bit TMU output
through V3D_DEBUG wasn't correctly forcing shadow comparisons to actually
be 32-bit in all the right places, leading to visual bugs with the
option enabled (Sponza being one example of this). This change eliminates
all of these issues.

Finally, the performance improvement observed from special casing shadow
comparison is negligible, and in specific scenarios it can even be
detrimental to performance due to increased register pressure (Sponza with
PCF filtering set to 4 is an example of this again).

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8684
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22284>
This commit is contained in:
Iago Toral Quiroga
2023-04-03 10:16:16 +02:00
committed by Marge Bot
parent 1bbbdbe666
commit 9217c565b2
8 changed files with 8 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/broadcom/compiler/v3d40_tex.c
View File

@@ -236,8 +236,7 @@ v3d40_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr)
* parameter if the output is 32 bit
*/
bool output_type_32_bit =
c->key->sampler[sampler_idx].return_size == 32 &&
!instr->is_shadow;
c->key->sampler[sampler_idx].return_size == 32;
struct V3D41_TMU_CONFIG_PARAMETER_0 p0_unpacked = {
};

15
src/broadcom/compiler/vir.c
View File

@@ -643,21 +643,6 @@ v3d_lower_nir(struct v3d_compile *c)
}
}
/* CS textures may not have return_size reflecting the shadow state. */
nir_foreach_uniform_variable(var, c->s) {
const struct glsl_type *type = glsl_without_array(var->type);
unsigned array_len = MAX2(glsl_get_length(var->type), 1);
if (!glsl_type_is_sampler(type) ||
!glsl_sampler_type_is_shadow(type))
continue;
for (int i = 0; i < array_len; i++) {
tex_options.lower_tex_packing[var->data.binding + i] =
nir_lower_tex_packing_16;
}
}
NIR_PASS(_, c->s, nir_lower_tex, &tex_options);
NIR_PASS(_, c->s, nir_lower_system_values);

2
src/broadcom/vulkan/v3dv_pipeline.c
View File

@@ -681,7 +681,7 @@ lower_tex_src(nir_builder *b,
else if (V3D_DBG(TMU_32BIT))
return_size = 32;
else
return_size = relaxed_precision || instr->is_shadow ? 16 : 32;
return_size = relaxed_precision ? 16 : 32;
struct v3dv_descriptor_map *map =
pipeline_get_descriptor_map(state->pipeline, binding_layout->type,