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aco: don't create byte-aligned short loads

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The ISA docs don't seem to say if this is allowed, so just assume short
loads require short alignment.

In practice, the only situation this should affect are byte-aligned u8vec2
loads.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
This commit is contained in:
Rhys Perry
2020-06-11 15:38:07 +01:00
committed by Marge Bot
parent c3259b6e6a
commit 91d7e40176
1 changed files with 3 additions and 1 deletions
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4
src/amd/compiler/aco_instruction_selection.cpp
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@@ -3111,7 +3111,9 @@ void emit_load(isel_context *ctx, Builder& bld, const LoadEmitInfo *info)
int byte_align = align_mul % 4 == 0 ? align_offset % 4 : -1;
if (byte_align) {
if ((bytes_needed > 2 || !supports_8bit_16bit_loads) && byte_align_loads) {
if ((bytes_needed > 2 ||
(bytes_needed == 2 && (align_mul % 2 || align_offset % 2)) ||
!supports_8bit_16bit_loads) && byte_align_loads) {
if (info->component_stride) {
assert(supports_8bit_16bit_loads && "unimplemented");
bytes_needed = 2;