diff --git a/.pick_status.json b/.pick_status.json
index 248a6e4658e..4212b1c1f55 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -274,7 +274,7 @@
         "description": "asahi: do not use \"Null\" layout",
         "nominated": true,
         "nomination_type": 4,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null,
         "notes": null
diff --git a/src/asahi/genxml/cmdbuf.xml b/src/asahi/genxml/cmdbuf.xml
index c497b791283..605b81fb06a 100644
--- a/src/asahi/genxml/cmdbuf.xml
+++ b/src/asahi/genxml/cmdbuf.xml
@@ -203,12 +203,9 @@
 
   <enum name="Image Mode">
     <value name="Normal" value="0"/>
-    <!-- Needs investigation, only seen with null textures so far -->
-    <value name="Null" value="1"/>
-    <!-- This is r/e, I can name things however I'd like.
-         Might be a legacy mode of some kind, we should investigate.
-      -->
-    <value name="Sparse but it does not seem to work" value="2"/>
+    <!-- This is r/e, I can name things however I'd like. -->
+    <value name="Not sparse but probably with counters" value="1"/>
+    <value name="Sparse but probably no counters" value="2"/>
     <value name="Sparse" value="3"/>
   </enum>
 
diff --git a/src/asahi/lib/agx_abi.h b/src/asahi/lib/agx_abi.h
index 20b6a37fef9..22f54145a2a 100644
--- a/src/asahi/lib/agx_abi.h
+++ b/src/asahi/lib/agx_abi.h
@@ -24,4 +24,4 @@
  * addressed with only small integers in the low/high. That lets us do some
  * robustness optimization even without soft fault.
  */
-#define AGX_ZERO_PAGE_ADDRESS (1ull << 32)
+#define AGX_ZERO_PAGE_ADDRESS (((uint64_t)1) << 32)
diff --git a/src/asahi/lib/agx_helpers.h b/src/asahi/lib/agx_helpers.h
index 29a1aa07129..bc5859404ce 100644
--- a/src/asahi/lib/agx_helpers.h
+++ b/src/asahi/lib/agx_helpers.h
@@ -168,7 +168,7 @@ agx_pack_line_width(float line_width)
  * the texture descriptor itself.
  */
 static void
-agx_set_null_texture(struct agx_texture_packed *tex, uint64_t valid_address)
+agx_set_null_texture(struct agx_texture_packed *tex)
 {
    agx_pack(tex, TEXTURE, cfg) {
       cfg.layout = AGX_LAYOUT_TWIDDLED;
@@ -178,8 +178,7 @@ agx_set_null_texture(struct agx_texture_packed *tex, uint64_t valid_address)
       cfg.swizzle_g = AGX_CHANNEL_0;
       cfg.swizzle_b = AGX_CHANNEL_0;
       cfg.swizzle_a = AGX_CHANNEL_0;
-      cfg.address = valid_address;
-      cfg.mode = AGX_IMAGE_MODE_NULL;
+      cfg.address = AGX_ZERO_PAGE_ADDRESS;
    }
 }
 
diff --git a/src/asahi/libagx/texture.cl b/src/asahi/libagx/texture.cl
index 6bd551c472f..3f40d3fa462 100644
--- a/src/asahi/libagx/texture.cl
+++ b/src/asahi/libagx/texture.cl
@@ -3,6 +3,7 @@
  * Copyright 2023 Valve Corporation
  * SPDX-License-Identifier: MIT
  */
+#include "asahi/lib/agx_abi.h"
 #include "compiler/libcl/libcl.h"
 #include "libagx_intrinsics.h"
 #include <agx_pack.h>
@@ -18,7 +19,7 @@ libagx_txs(constant struct agx_texture_packed *ptr, uint16_t lod,
     *
     *    OpImageQuery*...  return 0 if the bound descriptor is a null descriptor
     */
-   if (d.mode == AGX_IMAGE_MODE_NULL)
+   if (d.address == AGX_ZERO_PAGE_ADDRESS)
       return 0;
 
    /* Buffer textures are lowered to 2D so the original size is irrecoverable.
@@ -67,7 +68,7 @@ libagx_texture_samples(constant struct agx_texture_packed *ptr)
    agx_unpack(NULL, ptr, TEXTURE, d);
 
    /* As above */
-   if (d.mode == AGX_IMAGE_MODE_NULL)
+   if (d.address == AGX_ZERO_PAGE_ADDRESS)
       return 0;
 
    /* We may assume the input is multisampled, so just check the samples */
@@ -79,7 +80,7 @@ libagx_texture_levels(constant struct agx_texture_packed *ptr)
 {
    agx_unpack(NULL, ptr, TEXTURE, d);
 
-   if (d.mode == AGX_IMAGE_MODE_NULL)
+   if (d.address == AGX_ZERO_PAGE_ADDRESS)
       return 0;
    else
       return (d.last_level - d.first_level) + 1;
diff --git a/src/asahi/vulkan/hk_device.c b/src/asahi/vulkan/hk_device.c
index 6d05e597f1d..2b9e27383cf 100644
--- a/src/asahi/vulkan/hk_device.c
+++ b/src/asahi/vulkan/hk_device.c
@@ -302,7 +302,7 @@ hk_upload_null_descriptors(struct hk_device *dev)
    struct agx_pbe_packed null_pbe;
    uint32_t offset_tex, offset_pbe;
 
-   agx_set_null_texture(&null_tex, dev->rodata.null_sink);
+   agx_set_null_texture(&null_tex);
    agx_set_null_pbe(&null_pbe, dev->rodata.null_sink);
 
    hk_descriptor_table_add(dev, &dev->images, &null_tex, sizeof(null_tex),
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index b3ae2bf9bb4..39e61873e64 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -2777,7 +2777,7 @@ agx_upload_textures(struct agx_batch *batch, struct agx_compiled_shader *cs,
       struct agx_sampler_view *tex = ctx->stage[stage].textures[i];
 
       if (tex == NULL) {
-         agx_set_null_texture(&textures[i], T_tex.gpu);
+         agx_set_null_texture(&textures[i]);
          continue;
       }
 
@@ -2793,7 +2793,7 @@ agx_upload_textures(struct agx_batch *batch, struct agx_compiled_shader *cs,
    }
 
    for (unsigned i = nr_active_textures; i < nr_textures; ++i)
-      agx_set_null_texture(&textures[i], T_tex.gpu);
+      agx_set_null_texture(&textures[i]);
 
    for (unsigned i = 0; i < nr_images; ++i) {
       /* Image descriptors come in pairs after the textures */
@@ -2803,7 +2803,7 @@ agx_upload_textures(struct agx_batch *batch, struct agx_compiled_shader *cs,
       struct agx_pbe_packed *pbe = (struct agx_pbe_packed *)(texture + 1);
 
       if (!(ctx->stage[stage].image_mask & BITFIELD_BIT(i))) {
-         agx_set_null_texture(texture, T_tex.gpu);
+         agx_set_null_texture(texture);
          agx_set_null_pbe(pbe, agx_pool_alloc_aligned(&batch->pool, 1, 64).gpu);
          continue;
       }