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broadcom/compiler: rename is_ldunif_dst to try_rf0

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We flag nodes used to ldunif dst so we can try and favor allocating
rf0 to them, so be more explicit about its purpose.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31355>
This commit is contained in:
Iago Toral Quiroga
2024-09-24 12:43:12 +02:00
committed by Marge Bot
parent d2f7b6d5a7
commit 917e8e5439
2 changed files with 5 additions and 5 deletions
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2
src/broadcom/compiler/v3d_compiler.h
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@@ -619,7 +619,7 @@ struct v3d_ra_node_info {
bool payload_conflict; bool payload_conflict;
/* V3D 7.x */ /* V3D 7.x */
bool is_ldunif_dst; bool try_rf0;
} *info; } *info;
uint32_t alloc_count; uint32_t alloc_count;
}; };

8
src/broadcom/compiler/vir_register_allocate.c
View File

@@ -409,7 +409,7 @@ add_node(struct v3d_compile *c, uint32_t temp, uint8_t class_bits)
/* We fill the node priority after we are done inserting spills */ /* We fill the node priority after we are done inserting spills */
c->nodes.info[node].class_bits = class_bits; c->nodes.info[node].class_bits = class_bits;
c->nodes.info[node].priority = 0; c->nodes.info[node].priority = 0;
c->nodes.info[node].is_ldunif_dst = false; c->nodes.info[node].try_rf0 = false;
c->nodes.info[node].is_program_end = false; c->nodes.info[node].is_program_end = false;
c->nodes.info[node].unused = false; c->nodes.info[node].unused = false;
c->nodes.info[node].payload_conflict = false; c->nodes.info[node].payload_conflict = false;
@@ -965,7 +965,7 @@ v3d_ra_select_rf(struct v3d_ra_select_callback_data *v3d_ra,
* cond field to encode the dst and would prevent merge with * cond field to encode the dst and would prevent merge with
* instructions that use cond flags). * instructions that use cond flags).
*/ */
if (v3d_ra->nodes->info[node].is_ldunif_dst && if (v3d_ra->nodes->info[node].try_rf0 &&
BITSET_TEST(regs, v3d_ra->phys_index)) { BITSET_TEST(regs, v3d_ra->phys_index)) {
assert(v3d_ra->devinfo->ver >= 71); assert(v3d_ra->devinfo->ver >= 71);
*out = v3d_ra->phys_index; *out = v3d_ra->phys_index;
@@ -1320,7 +1320,7 @@ update_graph_and_reg_classes_for_inst(struct v3d_compile *c,
if (inst->qpu.sig.ldunif || inst->qpu.sig.ldunifa) { if (inst->qpu.sig.ldunif || inst->qpu.sig.ldunifa) {
const uint32_t dst_n = const uint32_t dst_n =
temp_to_node(c, inst->dst.index); temp_to_node(c, inst->dst.index);
c->nodes.info[dst_n].is_ldunif_dst = true; c->nodes.info[dst_n].try_rf0 = true;
} }
} }
} }
@@ -1433,7 +1433,7 @@ v3d_register_allocate(struct v3d_compile *c)
* without accumulators that can have implicit writes to phys regs. * without accumulators that can have implicit writes to phys regs.
*/ */
for (uint32_t i = 0; i < num_ra_nodes; i++) { for (uint32_t i = 0; i < num_ra_nodes; i++) {
c->nodes.info[i].is_ldunif_dst = false; c->nodes.info[i].try_rf0 = false;
c->nodes.info[i].is_program_end = false; c->nodes.info[i].is_program_end = false;
c->nodes.info[i].unused = false; c->nodes.info[i].unused = false;
c->nodes.info[i].priority = 0; c->nodes.info[i].priority = 0;