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intel/genxml: add disable preemption field for gen125

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Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20438>
This commit is contained in:
Tapani Pälli
2022-11-23 08:40:59 +02:00
committed by Marge Bot
parent afdbed9e9c
commit 910f5a18cf
1 changed files with 3 additions and 1 deletions
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4
src/intel/genxml/gen125.xml
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@@ -7414,7 +7414,9 @@
<value name="Mid-cmdbuffer Preemption" value="0" /> <value name="Mid-cmdbuffer Preemption" value="0" />
<value name="Object Level Preemption" value="1" /> <value name="Object Level Preemption" value="1" />
</field> </field>
<field name="Disable Preemption and High Priority Pausing due to 3DPRIMITIVE Command" start="10" end="10" type="bool" />
<field name="Replay Mode Mask" start="16" end="16" type="bool" /> <field name="Replay Mode Mask" start="16" end="16" type="bool" />
<field name="Disable Preemption and High Priority Pausing due to 3DPRIMITIVE Command Mask" start="26" end="26" type="bool" />
</register> </register>
<register name="CS_DEBUG_MODE2" length="1" num="0x20d8"> <register name="CS_DEBUG_MODE2" length="1" num="0x20d8">
<field name="3D Rendering Instruction Disable" start="0" end="0" type="bool" /> <field name="3D Rendering Instruction Disable" start="0" end="0" type="bool" />
@@ -7704,4 +7706,4 @@
<register name="VS_INVOCATION_COUNT" length="2" num="0x2320"> <register name="VS_INVOCATION_COUNT" length="2" num="0x2320">
<field name="VS Invocation Count Report" start="0" end="63" type="uint" /> <field name="VS Invocation Count Report" start="0" end="63" type="uint" />
</register> </register>
</genxml> </genxml>