OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

radv: implement dynamic logic op

Browse Source 
This is part of VK_EXT_extended_dynamic_state2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10880>
This commit is contained in:
Samuel Pitoiset
2021-05-17 10:41:24 +02:00
committed by Marge Bot
parent e6bf5cfe59
commit 8efa897168
5 changed files with 107 additions and 52 deletions
Download Patch File Download Diff File Expand all files Collapse all files

68
src/amd/vulkan/radv_pipeline.c
View File

@@ -51,7 +51,6 @@ struct radv_blend_state {
uint32_t blend_enable_4bit;
uint32_t need_src_alpha;
uint32_t cb_color_control;
uint32_t cb_target_mask;
uint32_t cb_target_enabled_4bit;
uint32_t sx_mrt_blend_opt[8];
@@ -275,47 +274,6 @@ radv_pipeline_init_scratch(const struct radv_device *device, struct radv_pipelin
pipeline->max_waves = max_waves;
}
static uint32_t
si_translate_blend_logic_op(VkLogicOp op)
{
switch (op) {
case VK_LOGIC_OP_CLEAR:
return V_028808_ROP3_CLEAR;
case VK_LOGIC_OP_AND:
return V_028808_ROP3_AND;
case VK_LOGIC_OP_AND_REVERSE:
return V_028808_ROP3_AND_REVERSE;
case VK_LOGIC_OP_COPY:
return V_028808_ROP3_COPY;
case VK_LOGIC_OP_AND_INVERTED:
return V_028808_ROP3_AND_INVERTED;
case VK_LOGIC_OP_NO_OP:
return V_028808_ROP3_NO_OP;
case VK_LOGIC_OP_XOR:
return V_028808_ROP3_XOR;
case VK_LOGIC_OP_OR:
return V_028808_ROP3_OR;
case VK_LOGIC_OP_NOR:
return V_028808_ROP3_NOR;
case VK_LOGIC_OP_EQUIVALENT:
return V_028808_ROP3_EQUIVALENT;
case VK_LOGIC_OP_INVERT:
return V_028808_ROP3_INVERT;
case VK_LOGIC_OP_OR_REVERSE:
return V_028808_ROP3_OR_REVERSE;
case VK_LOGIC_OP_COPY_INVERTED:
return V_028808_ROP3_COPY_INVERTED;
case VK_LOGIC_OP_OR_INVERTED:
return V_028808_ROP3_OR_INVERTED;
case VK_LOGIC_OP_NAND:
return V_028808_ROP3_NAND;
case VK_LOGIC_OP_SET:
return V_028808_ROP3_SET;
default:
unreachable("Unhandled logic op");
}
}
static uint32_t
si_translate_blend_function(VkBlendOp op)
{
@@ -656,7 +614,7 @@ radv_blend_check_commutativity(struct radv_blend_state *blend, VkBlendOp op, VkB
}
static struct radv_blend_state
radv_pipeline_init_blend_state(const struct radv_pipeline *pipeline,
radv_pipeline_init_blend_state(struct radv_pipeline *pipeline,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct radv_graphics_pipeline_create_info *extra)
{
@@ -666,6 +624,7 @@ radv_pipeline_init_blend_state(const struct radv_pipeline *pipeline,
radv_pipeline_get_multisample_state(pCreateInfo);
struct radv_blend_state blend = {0};
unsigned mode = V_028808_CB_NORMAL;
unsigned cb_color_control = 0;
int i;
if (extra && extra->custom_blend_mode) {
@@ -673,12 +632,11 @@ radv_pipeline_init_blend_state(const struct radv_pipeline *pipeline,
mode = extra->custom_blend_mode;
}
blend.cb_color_control = 0;
if (vkblend) {
if (vkblend->logicOpEnable)
blend.cb_color_control |= S_028808_ROP3(si_translate_blend_logic_op(vkblend->logicOp));
cb_color_control |= S_028808_ROP3(si_translate_blend_logic_op(vkblend->logicOp));
else
blend.cb_color_control |= S_028808_ROP3(V_028808_ROP3_COPY);
cb_color_control |= S_028808_ROP3(V_028808_ROP3_COPY);
}
blend.db_alpha_to_mask = S_028B70_ALPHA_TO_MASK_OFFSET0(3) | S_028B70_ALPHA_TO_MASK_OFFSET1(1) |
@@ -819,15 +777,18 @@ radv_pipeline_init_blend_state(const struct radv_pipeline *pipeline,
*/
if (blend.mrt0_is_dual_src || (vkblend && vkblend->logicOpEnable) ||
mode == V_028808_CB_RESOLVE)
blend.cb_color_control |= S_028808_DISABLE_DUAL_QUAD(1);
cb_color_control |= S_028808_DISABLE_DUAL_QUAD(1);
}
if (blend.cb_target_mask)
blend.cb_color_control |= S_028808_MODE(mode);
cb_color_control |= S_028808_MODE(mode);
else
blend.cb_color_control |= S_028808_MODE(V_028808_CB_DISABLE);
cb_color_control |= S_028808_MODE(V_028808_CB_DISABLE);
radv_pipeline_compute_spi_color_formats(pipeline, pCreateInfo, &blend);
pipeline->graphics.cb_color_control = cb_color_control;
return blend;
}
@@ -1760,6 +1721,14 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline,
pCreateInfo->pRasterizationState->rasterizerDiscardEnable;
}
if (subpass->has_color_att && states & RADV_DYNAMIC_LOGIC_OP) {
if (pCreateInfo->pColorBlendState->logicOpEnable) {
dynamic->logic_op = si_translate_blend_logic_op(pCreateInfo->pColorBlendState->logicOp);
} else {
dynamic->logic_op = V_028808_ROP3_COPY;
}
}
pipeline->dynamic_state.mask = states;
}
@@ -4253,7 +4222,6 @@ radv_pipeline_generate_blend_state(struct radeon_cmdbuf *ctx_cs,
{
radeon_set_context_reg_seq(ctx_cs, R_028780_CB_BLEND0_CONTROL, 8);
radeon_emit_array(ctx_cs, blend->cb_blend_control, 8);
radeon_set_context_reg(ctx_cs, R_028808_CB_COLOR_CONTROL, blend->cb_color_control);
radeon_set_context_reg(ctx_cs, R_028B70_DB_ALPHA_TO_MASK, blend->db_alpha_to_mask);
if (pipeline->device->physical_device->rad_info.has_rbplus) {