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anv: Keep track of whether the data cache should be enabled in L3

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If images or shader buffers are used, we will enable the data cache in
the the L3 config.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Jordan Justen
2016-04-02 13:44:55 -07:00
parent ff41738871
commit 8ee31828c6
3 changed files with 11 additions and 1 deletions
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9
src/intel/vulkan/anv_pipeline.c
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@@ -332,8 +332,13 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
if (pipeline->layout && pipeline->layout->stage[stage].has_dynamic_offsets) if (pipeline->layout && pipeline->layout->stage[stage].has_dynamic_offsets)
prog_data->nr_params += MAX_DYNAMIC_BUFFERS * 2; prog_data->nr_params += MAX_DYNAMIC_BUFFERS * 2;
if (nir->info.num_images > 0) if (nir->info.num_images > 0) {
prog_data->nr_params += nir->info.num_images * BRW_IMAGE_PARAM_SIZE; prog_data->nr_params += nir->info.num_images * BRW_IMAGE_PARAM_SIZE;
pipeline->needs_data_cache = true;
}
if (nir->info.num_ssbos > 0)
pipeline->needs_data_cache = true;
if (prog_data->nr_params > 0) { if (prog_data->nr_params > 0) {
/* XXX: I think we're leaking this */ /* XXX: I think we're leaking this */
@@ -1113,6 +1118,8 @@ anv_pipeline_init(struct anv_pipeline *pipeline,
pipeline->use_repclear = extra && extra->use_repclear; pipeline->use_repclear = extra && extra->use_repclear;
pipeline->needs_data_cache = false;
/* When we free the pipeline, we detect stages based on the NULL status /* When we free the pipeline, we detect stages based on the NULL status
* of various prog_data pointers. Make them NULL by default. * of various prog_data pointers. Make them NULL by default.
*/ */

1
src/intel/vulkan/anv_private.h
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@@ -1403,6 +1403,7 @@ struct anv_pipeline {
struct anv_pipeline_bind_map bindings[MESA_SHADER_STAGES]; struct anv_pipeline_bind_map bindings[MESA_SHADER_STAGES];
bool use_repclear; bool use_repclear;
bool needs_data_cache;
const struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES]; const struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
uint32_t scratch_start[MESA_SHADER_STAGES]; uint32_t scratch_start[MESA_SHADER_STAGES];

2
src/intel/vulkan/genX_pipeline.c
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@@ -74,6 +74,8 @@ genX(compute_pipeline_create)(
pipeline->active_stages = 0; pipeline->active_stages = 0;
pipeline->total_scratch = 0; pipeline->total_scratch = 0;
pipeline->needs_data_cache = false;
assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT); assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT);
ANV_FROM_HANDLE(anv_shader_module, module, pCreateInfo->stage.module); ANV_FROM_HANDLE(anv_shader_module, module, pCreateInfo->stage.module);
anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module, anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module,