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i965/fs: Less broken handling of force_writemask_all in lower_load_payload().

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It's perfectly fine to read the second half of a register written with
force_writemask_all from a first half MOV instruction or vice versa, and
lower_load_payload shouldn't mark the whole MOV as belonging to the second
half in that case.  Replicate the same metadata to both halves of the
destination when writemasking is disabled.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
This commit is contained in:
Francisco Jerez
2015-01-17 14:12:34 +02:00
parent 57d80d11b1
commit 8e47f51a5a
1 changed files with 13 additions and 7 deletions
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10
src/mesa/drivers/dri/i965/brw_fs.cpp
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@@ -3135,9 +3135,11 @@ fs_visitor::lower_load_payload()
}
if (inst->dst.file == MRF || inst->dst.file == GRF) {
bool force_sechalf = inst->force_sechalf;
bool force_sechalf = inst->force_sechalf &&
!inst->force_writemask_all;
bool toggle_sechalf = inst->dst.width == 16 &&
type_sz(inst->dst.type) == 4;
type_sz(inst->dst.type) == 4 &&
!inst->force_writemask_all;
for (int i = 0; i < inst->regs_written; ++i) {
metadata[dst_reg + i].written = true;
metadata[dst_reg + i].force_sechalf = force_sechalf;
@@ -3180,12 +3182,16 @@ fs_visitor::lower_load_payload()
mov->force_writemask_all = metadata[src_reg].force_writemask_all;
metadata[dst_reg] = metadata[src_reg];
if (dst.width * type_sz(dst.type) > 32) {
if (metadata[src_reg].force_writemask_all) {
metadata[dst_reg + 1] = metadata[src_reg];
} else {
assert((!metadata[src_reg].written ||
!metadata[src_reg].force_sechalf) &&
(!metadata[src_reg + 1].written ||
metadata[src_reg + 1].force_sechalf));
metadata[dst_reg + 1] = metadata[src_reg + 1];
}
}
} else {
metadata[dst_reg].force_writemask_all = false;
metadata[dst_reg].force_sechalf = false;