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etnaviv: use feature bit for one const src per instuction limitation

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Support for multiple constant sources per instruction is not a HALTI5
capability, there is a separate feature bit to signal the availability
of this shader core enhancement.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9255>
This commit is contained in:
Lucas Stach
2022-04-09 19:00:12 +02:00
committed by Marge Bot
parent 5fcf55bb15
commit 8d6b6e31e1
5 changed files with 9 additions and 6 deletions
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2
src/gallium/drivers/etnaviv/etnaviv_asm.c
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@@ -65,7 +65,7 @@ etna_assemble(uint32_t *out, const struct etna_inst *inst)
if (inst->imm && inst->src[2].use)
return 1;
if (!inst->halti5 && !check_uniforms(inst))
if (!inst->no_oneconst_limit && !check_uniforms(inst))
BUG("error: generating instruction that accesses two different uniforms");
assert(!(inst->opcode&~0x7f));

2
src/gallium/drivers/etnaviv/etnaviv_asm.h
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@@ -97,7 +97,7 @@ struct etna_inst {
unsigned sel_bit0:1; /* select low half mediump */
unsigned sel_bit1:1; /* select high half mediump */
unsigned dst_full:1; /* write to highp register */
unsigned halti5:1; /* allow multiple different uniform sources */
unsigned no_oneconst_limit:1; /* allow multiple different uniform sources */
struct etna_inst_dst dst; /* destination operand */
struct etna_inst_tex tex; /* texture operand */
struct etna_inst_src src[ETNA_NUM_SRC]; /* source operand */

7
src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c
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@@ -732,7 +732,7 @@ insert_vec_mov(nir_alu_instr *vec, unsigned start_idx, nir_shader *shader)
* -insert movs (nir_lower_vec_to_movs equivalent)
* for non-vecN instructions:
* -try to merge constants as single constant
* -insert movs for multiple constants (pre-HALTI5)
* -insert movs for multiple constants if required
*/
static void
lower_alu(struct etna_compile *c, nir_alu_instr *alu)
@@ -749,8 +749,7 @@ lower_alu(struct etna_compile *c, nir_alu_instr *alu)
case nir_op_vec4:
break;
default:
/* pre-GC7000L can only have 1 uniform src per instruction */
if (c->specs->halti >= 5)
if (c->specs->has_no_oneconst_limit)
return;
nir_const_value value[4] = {};
@@ -1195,7 +1194,7 @@ etna_compile_shader(struct etna_shader_variant *v)
if (inst->opcode == INST_OPCODE_BRANCH)
inst->imm = block_ptr[inst->imm];
inst->halti5 = specs->halti >= 5;
inst->no_oneconst_limit = specs->has_no_oneconst_limit;
etna_assemble(&code[i * 4], inst);
}

2
src/gallium/drivers/etnaviv/etnaviv_internal.h
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@@ -77,6 +77,8 @@ struct etna_specs {
unsigned has_new_transcendentals : 1;
/* has the new dp2/dpX_norm instructions, among others */
unsigned has_halti2_instructions : 1;
/* has no limit on the number of constant sources per instruction */
unsigned has_no_oneconst_limit : 1;
/* has V4_COMPRESSION */
unsigned v4_compression : 1;
/* supports single-buffer rendering with multiple pixel pipes */

2
src/gallium/drivers/etnaviv/etnaviv_screen.c
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@@ -837,6 +837,8 @@ etna_get_specs(struct etna_screen *screen)
VIV_FEATURE(screen, chipMinorFeatures3, HAS_FAST_TRANSCENDENTALS);
screen->specs.has_halti2_instructions =
VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
screen->specs.has_no_oneconst_limit =
VIV_FEATURE(screen, chipMinorFeatures8, SH_NO_ONECONST_LIMIT);
screen->specs.v4_compression =
VIV_FEATURE(screen, chipMinorFeatures6, V4_COMPRESSION);
screen->specs.seamless_cube_map =