i965: Remove #define name from PCI ID table.

Nothing uses the #define name, and it's not terribly useful - the
numerical ID serves the same purpose.  The only thing we could really do
with it is generate slightly prettier preprocessed code.  But who looks
at that?

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
This commit is contained in:
Kenneth Graunke
2013-07-04 11:55:36 -07:00
parent 90511faedd
commit 8d4ecbccd6
3 changed files with 95 additions and 95 deletions

View File

@@ -1,93 +1,93 @@
CHIPSET(0x29A2, I965_G, "Intel(R) 965G")
CHIPSET(0x2992, I965_Q, "Intel(R) 965Q")
CHIPSET(0x2982, I965_G_1, "Intel(R) 965G")
CHIPSET(0x2972, I946_GZ, "Intel(R) 946GZ")
CHIPSET(0x2A02, I965_GM, "Intel(R) 965GM")
CHIPSET(0x2A12, I965_GME, "Intel(R) 965GME/GLE")
CHIPSET(0x2A42, GM45_GM, "Mobile Intel® GM45 Express Chipset")
CHIPSET(0x2E02, IGD_E_G, "Intel(R) Integrated Graphics Device")
CHIPSET(0x2E12, Q45_G, "Intel(R) Q45/Q43")
CHIPSET(0x2E22, G45_G, "Intel(R) G45/G43")
CHIPSET(0x2E32, G41_G, "Intel(R) G41")
CHIPSET(0x2E42, B43_G, "Intel(R) B43")
CHIPSET(0x2E92, B43_G1, "Intel(R) B43")
CHIPSET(0x0042, ILD_G, "Intel(R) Ironlake Desktop")
CHIPSET(0x0046, ILM_G, "Intel(R) Ironlake Mobile")
CHIPSET(0x0102, SANDYBRIDGE_GT1, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0112, SANDYBRIDGE_GT2, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0106, SANDYBRIDGE_M_GT1, "Intel(R) Sandybridge Mobile")
CHIPSET(0x0116, SANDYBRIDGE_M_GT2, "Intel(R) Sandybridge Mobile")
CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, "Intel(R) Sandybridge Mobile")
CHIPSET(0x010A, SANDYBRIDGE_S, "Intel(R) Sandybridge Server")
CHIPSET(0x0152, IVYBRIDGE_GT1, "Intel(R) Ivybridge Desktop")
CHIPSET(0x0162, IVYBRIDGE_GT2, "Intel(R) Ivybridge Desktop")
CHIPSET(0x0156, IVYBRIDGE_M_GT1, "Intel(R) Ivybridge Mobile")
CHIPSET(0x0166, IVYBRIDGE_M_GT2, "Intel(R) Ivybridge Mobile")
CHIPSET(0x015a, IVYBRIDGE_S_GT1, "Intel(R) Ivybridge Server")
CHIPSET(0x016a, IVYBRIDGE_S_GT2, "Intel(R) Ivybridge Server")
CHIPSET(0x0402, HASWELL_GT1, "Intel(R) Haswell Desktop")
CHIPSET(0x0412, HASWELL_GT2, "Intel(R) Haswell Desktop")
CHIPSET(0x0422, HASWELL_GT3, "Intel(R) Haswell Desktop")
CHIPSET(0x0406, HASWELL_M_GT1, "Intel(R) Haswell Mobile")
CHIPSET(0x0416, HASWELL_M_GT2, "Intel(R) Haswell Mobile")
CHIPSET(0x0426, HASWELL_M_GT3, "Intel(R) Haswell Mobile")
CHIPSET(0x040A, HASWELL_S_GT1, "Intel(R) Haswell Server")
CHIPSET(0x041A, HASWELL_S_GT2, "Intel(R) Haswell Server")
CHIPSET(0x042A, HASWELL_S_GT3, "Intel(R) Haswell Server")
CHIPSET(0x040B, HASWELL_B_GT1, "Intel(R) Haswell")
CHIPSET(0x041B, HASWELL_B_GT2, "Intel(R) Haswell")
CHIPSET(0x042B, HASWELL_B_GT3, "Intel(R) Haswell")
CHIPSET(0x040E, HASWELL_E_GT1, "Intel(R) Haswell")
CHIPSET(0x041E, HASWELL_E_GT2, "Intel(R) Haswell")
CHIPSET(0x042E, HASWELL_E_GT3, "Intel(R) Haswell")
CHIPSET(0x0C02, HASWELL_SDV_GT1, "Intel(R) Haswell Desktop")
CHIPSET(0x0C12, HASWELL_SDV_GT2, "Intel(R) Haswell Desktop")
CHIPSET(0x0C22, HASWELL_SDV_GT3, "Intel(R) Haswell Desktop")
CHIPSET(0x0C06, HASWELL_SDV_M_GT1, "Intel(R) Haswell Mobile")
CHIPSET(0x0C16, HASWELL_SDV_M_GT2, "Intel(R) Haswell Mobile")
CHIPSET(0x0C26, HASWELL_SDV_M_GT3, "Intel(R) Haswell Mobile")
CHIPSET(0x0C0A, HASWELL_SDV_S_GT1, "Intel(R) Haswell Server")
CHIPSET(0x0C1A, HASWELL_SDV_S_GT2, "Intel(R) Haswell Server")
CHIPSET(0x0C2A, HASWELL_SDV_S_GT3, "Intel(R) Haswell Server")
CHIPSET(0x0C0B, HASWELL_SDV_B_GT1, "Intel(R) Haswell")
CHIPSET(0x0C1B, HASWELL_SDV_B_GT2, "Intel(R) Haswell")
CHIPSET(0x0C2B, HASWELL_SDV_B_GT3, "Intel(R) Haswell")
CHIPSET(0x0C0E, HASWELL_SDV_E_GT1, "Intel(R) Haswell")
CHIPSET(0x0C1E, HASWELL_SDV_E_GT2, "Intel(R) Haswell")
CHIPSET(0x0C2E, HASWELL_SDV_E_GT3, "Intel(R) Haswell")
CHIPSET(0x0A02, HASWELL_ULT_GT1, "Intel(R) Haswell Desktop")
CHIPSET(0x0A12, HASWELL_ULT_GT2, "Intel(R) Haswell Desktop")
CHIPSET(0x0A22, HASWELL_ULT_GT3, "Intel(R) Haswell Desktop")
CHIPSET(0x0A06, HASWELL_ULT_M_GT1, "Intel(R) Haswell Mobile")
CHIPSET(0x0A16, HASWELL_ULT_M_GT2, "Intel(R) Haswell Mobile")
CHIPSET(0x0A26, HASWELL_ULT_M_GT3, "Intel(R) Haswell Mobile")
CHIPSET(0x0A0A, HASWELL_ULT_S_GT1, "Intel(R) Haswell Server")
CHIPSET(0x0A1A, HASWELL_ULT_S_GT2, "Intel(R) Haswell Server")
CHIPSET(0x0A2A, HASWELL_ULT_S_GT3, "Intel(R) Haswell Server")
CHIPSET(0x0A0B, HASWELL_ULT_B_GT1, "Intel(R) Haswell")
CHIPSET(0x0A1B, HASWELL_ULT_B_GT2, "Intel(R) Haswell")
CHIPSET(0x0A2B, HASWELL_ULT_B_GT3, "Intel(R) Haswell")
CHIPSET(0x0A0E, HASWELL_ULT_E_GT1, "Intel(R) Haswell")
CHIPSET(0x0A1E, HASWELL_ULT_E_GT2, "Intel(R) Haswell")
CHIPSET(0x0A2E, HASWELL_ULT_E_GT3, "Intel(R) Haswell")
CHIPSET(0x0D02, HASWELL_CRW_GT1, "Intel(R) Haswell Desktop")
CHIPSET(0x0D12, HASWELL_CRW_GT2, "Intel(R) Haswell Desktop")
CHIPSET(0x0D22, HASWELL_CRW_GT3, "Intel(R) Haswell Desktop")
CHIPSET(0x0D06, HASWELL_CRW_M_GT1, "Intel(R) Haswell Mobile")
CHIPSET(0x0D16, HASWELL_CRW_M_GT2, "Intel(R) Haswell Mobile")
CHIPSET(0x0D26, HASWELL_CRW_M_GT3, "Intel(R) Haswell Mobile")
CHIPSET(0x0D0A, HASWELL_CRW_S_GT1, "Intel(R) Haswell Server")
CHIPSET(0x0D1A, HASWELL_CRW_S_GT2, "Intel(R) Haswell Server")
CHIPSET(0x0D2A, HASWELL_CRW_S_GT3, "Intel(R) Haswell")
CHIPSET(0x0D0B, HASWELL_CRW_B_GT1, "Intel(R) Haswell")
CHIPSET(0x0D1B, HASWELL_CRW_B_GT2, "Intel(R) Haswell")
CHIPSET(0x0D2B, HASWELL_CRW_B_GT3, "Intel(R) Haswell")
CHIPSET(0x0D0E, HASWELL_CRW_E_GT1, "Intel(R) Haswell")
CHIPSET(0x0D1E, HASWELL_CRW_E_GT2, "Intel(R) Haswell")
CHIPSET(0x0D2E, HASWELL_CRW_E_GT3, "Intel(R) Haswell")
CHIPSET(0x0F31, BAYTRAIL_M_1, "Intel(R) Bay Trail")
CHIPSET(0x0F32, BAYTRAIL_M_2, "Intel(R) Bay Trail")
CHIPSET(0x0F33, BAYTRAIL_M_3, "Intel(R) Bay Trail")
CHIPSET(0x0157, BAYTRAIL_M_4, "Intel(R) Bay Trail")
CHIPSET(0x0155, BAYTRAIL_D, "Intel(R) Bay Trail")
CHIPSET(0x29A2, "Intel(R) 965G")
CHIPSET(0x2992, "Intel(R) 965Q")
CHIPSET(0x2982, "Intel(R) 965G")
CHIPSET(0x2972, "Intel(R) 946GZ")
CHIPSET(0x2A02, "Intel(R) 965GM")
CHIPSET(0x2A12, "Intel(R) 965GME/GLE")
CHIPSET(0x2A42, "Mobile Intel® GM45 Express Chipset")
CHIPSET(0x2E02, "Intel(R) Integrated Graphics Device")
CHIPSET(0x2E12, "Intel(R) Q45/Q43")
CHIPSET(0x2E22, "Intel(R) G45/G43")
CHIPSET(0x2E32, "Intel(R) G41")
CHIPSET(0x2E42, "Intel(R) B43")
CHIPSET(0x2E92, "Intel(R) B43")
CHIPSET(0x0042, "Intel(R) Ironlake Desktop")
CHIPSET(0x0046, "Intel(R) Ironlake Mobile")
CHIPSET(0x0102, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0112, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0122, "Intel(R) Sandybridge Desktop")
CHIPSET(0x0106, "Intel(R) Sandybridge Mobile")
CHIPSET(0x0116, "Intel(R) Sandybridge Mobile")
CHIPSET(0x0126, "Intel(R) Sandybridge Mobile")
CHIPSET(0x010A, "Intel(R) Sandybridge Server")
CHIPSET(0x0152, "Intel(R) Ivybridge Desktop")
CHIPSET(0x0162, "Intel(R) Ivybridge Desktop")
CHIPSET(0x0156, "Intel(R) Ivybridge Mobile")
CHIPSET(0x0166, "Intel(R) Ivybridge Mobile")
CHIPSET(0x015a, "Intel(R) Ivybridge Server")
CHIPSET(0x016a, "Intel(R) Ivybridge Server")
CHIPSET(0x0402, "Intel(R) Haswell Desktop")
CHIPSET(0x0412, "Intel(R) Haswell Desktop")
CHIPSET(0x0422, "Intel(R) Haswell Desktop")
CHIPSET(0x0406, "Intel(R) Haswell Mobile")
CHIPSET(0x0416, "Intel(R) Haswell Mobile")
CHIPSET(0x0426, "Intel(R) Haswell Mobile")
CHIPSET(0x040A, "Intel(R) Haswell Server")
CHIPSET(0x041A, "Intel(R) Haswell Server")
CHIPSET(0x042A, "Intel(R) Haswell Server")
CHIPSET(0x040B, "Intel(R) Haswell")
CHIPSET(0x041B, "Intel(R) Haswell")
CHIPSET(0x042B, "Intel(R) Haswell")
CHIPSET(0x040E, "Intel(R) Haswell")
CHIPSET(0x041E, "Intel(R) Haswell")
CHIPSET(0x042E, "Intel(R) Haswell")
CHIPSET(0x0C02, "Intel(R) Haswell Desktop")
CHIPSET(0x0C12, "Intel(R) Haswell Desktop")
CHIPSET(0x0C22, "Intel(R) Haswell Desktop")
CHIPSET(0x0C06, "Intel(R) Haswell Mobile")
CHIPSET(0x0C16, "Intel(R) Haswell Mobile")
CHIPSET(0x0C26, "Intel(R) Haswell Mobile")
CHIPSET(0x0C0A, "Intel(R) Haswell Server")
CHIPSET(0x0C1A, "Intel(R) Haswell Server")
CHIPSET(0x0C2A, "Intel(R) Haswell Server")
CHIPSET(0x0C0B, "Intel(R) Haswell")
CHIPSET(0x0C1B, "Intel(R) Haswell")
CHIPSET(0x0C2B, "Intel(R) Haswell")
CHIPSET(0x0C0E, "Intel(R) Haswell")
CHIPSET(0x0C1E, "Intel(R) Haswell")
CHIPSET(0x0C2E, "Intel(R) Haswell")
CHIPSET(0x0A02, "Intel(R) Haswell Desktop")
CHIPSET(0x0A12, "Intel(R) Haswell Desktop")
CHIPSET(0x0A22, "Intel(R) Haswell Desktop")
CHIPSET(0x0A06, "Intel(R) Haswell Mobile")
CHIPSET(0x0A16, "Intel(R) Haswell Mobile")
CHIPSET(0x0A26, "Intel(R) Haswell Mobile")
CHIPSET(0x0A0A, "Intel(R) Haswell Server")
CHIPSET(0x0A1A, "Intel(R) Haswell Server")
CHIPSET(0x0A2A, "Intel(R) Haswell Server")
CHIPSET(0x0A0B, "Intel(R) Haswell")
CHIPSET(0x0A1B, "Intel(R) Haswell")
CHIPSET(0x0A2B, "Intel(R) Haswell")
CHIPSET(0x0A0E, "Intel(R) Haswell")
CHIPSET(0x0A1E, "Intel(R) Haswell")
CHIPSET(0x0A2E, "Intel(R) Haswell")
CHIPSET(0x0D02, "Intel(R) Haswell Desktop")
CHIPSET(0x0D12, "Intel(R) Haswell Desktop")
CHIPSET(0x0D22, "Intel(R) Haswell Desktop")
CHIPSET(0x0D06, "Intel(R) Haswell Mobile")
CHIPSET(0x0D16, "Intel(R) Haswell Mobile")
CHIPSET(0x0D26, "Intel(R) Haswell Mobile")
CHIPSET(0x0D0A, "Intel(R) Haswell Server")
CHIPSET(0x0D1A, "Intel(R) Haswell Server")
CHIPSET(0x0D2A, "Intel(R) Haswell")
CHIPSET(0x0D0B, "Intel(R) Haswell")
CHIPSET(0x0D1B, "Intel(R) Haswell")
CHIPSET(0x0D2B, "Intel(R) Haswell")
CHIPSET(0x0D0E, "Intel(R) Haswell")
CHIPSET(0x0D1E, "Intel(R) Haswell")
CHIPSET(0x0D2E, "Intel(R) Haswell")
CHIPSET(0x0F31, "Intel(R) Bay Trail")
CHIPSET(0x0F32, "Intel(R) Bay Trail")
CHIPSET(0x0F33, "Intel(R) Bay Trail")
CHIPSET(0x0157, "Intel(R) Bay Trail")
CHIPSET(0x0155, "Intel(R) Bay Trail")

View File

@@ -14,7 +14,7 @@ static const int i915_chip_ids[] = {
};
static const int i965_chip_ids[] = {
#define CHIPSET(chip, desc, name) chip,
#define CHIPSET(chip, name) chip,
#include "pci_ids/i965_pci_ids.h"
#undef CHIPSET
};