From 8d03e5a8632c56028ba32e6d669d68bdcd2657ea Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 24 Sep 2021 11:17:40 +0200 Subject: [PATCH] radv: stop using the shader keys for as_ls/as_es/as_ngg when possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit radv_shader_info should be initialized correctly at this point. There is still few occurences earlier in the pipeline but they aren't easy to remove right now. Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/vulkan/radv_nir_to_llvm.c | 44 ++++++++++++++++--------------- src/amd/vulkan/radv_shader_args.c | 38 +++++++++++++------------- 2 files changed, 42 insertions(+), 40 deletions(-) diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 8efefa77260..a9d2415b590 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -166,7 +166,7 @@ static void create_function(struct radv_shader_context *ctx, gl_shader_stage stage, bool has_previous_stage) { if (ctx->ac.chip_class >= GFX10) { - if (is_pre_gs_stage(stage) && ctx->args->options->key.vs_common_out.as_ngg) { + if (is_pre_gs_stage(stage) && ctx->args->shader_info->is_ngg) { /* On GFX10, VS is merged into GS for NGG. */ stage = MESA_SHADER_GEOMETRY; has_previous_stage = true; @@ -187,7 +187,7 @@ create_function(struct radv_shader_context *ctx, gl_shader_stage stage, bool has load_descriptor_sets(ctx); if (stage == MESA_SHADER_TESS_CTRL || - (stage == MESA_SHADER_VERTEX && ctx->args->options->key.vs_common_out.as_ls) || + (stage == MESA_SHADER_VERTEX && ctx->args->shader_info->vs.as_ls) || /* GFX9 has the ESGS ring buffer in LDS. */ (stage == MESA_SHADER_GEOMETRY && has_previous_stage)) { ac_declare_lds_as_pointer(&ctx->ac); @@ -304,7 +304,7 @@ visit_emit_vertex_with_counter(struct ac_shader_abi *abi, unsigned stream, LLVMV unsigned offset = 0; struct radv_shader_context *ctx = radv_shader_context_from_abi(abi); - if (ctx->args->options->key.vs_common_out.as_ngg) { + if (ctx->args->shader_info->is_ngg) { gfx10_ngg_gs_emit_vertex(ctx, stream, vertexidx, addrs); return; } @@ -349,7 +349,7 @@ visit_end_primitive(struct ac_shader_abi *abi, unsigned stream) { struct radv_shader_context *ctx = radv_shader_context_from_abi(abi); - if (ctx->args->options->key.vs_common_out.as_ngg) { + if (ctx->args->shader_info->is_ngg) { LLVMBuildStore(ctx->ac.builder, ctx->ac.i32_0, ctx->gs_curprim_verts[stream]); return; } @@ -2174,7 +2174,7 @@ handle_fs_outputs_post(struct radv_shader_context *ctx) static void emit_gs_epilogue(struct radv_shader_context *ctx) { - if (ctx->args->options->key.vs_common_out.as_ngg) { + if (ctx->args->shader_info->is_ngg) { gfx10_ngg_gs_emit_epilogue_1(ctx); return; } @@ -2192,11 +2192,11 @@ handle_shader_outputs_post(struct ac_shader_abi *abi) switch (ctx->stage) { case MESA_SHADER_VERTEX: - if (ctx->args->options->key.vs_common_out.as_ls) + if (ctx->args->shader_info->vs.as_ls) break; /* Lowered in NIR */ - else if (ctx->args->options->key.vs_common_out.as_es) + else if (ctx->args->shader_info->vs.as_es) break; /* Lowered in NIR */ - else if (ctx->args->options->key.vs_common_out.as_ngg) + else if (ctx->args->shader_info->is_ngg) break; else handle_vs_outputs_post(ctx, ctx->args->options->key.vs_common_out.export_prim_id, @@ -2212,9 +2212,9 @@ handle_shader_outputs_post(struct ac_shader_abi *abi) case MESA_SHADER_TESS_CTRL: break; /* Lowered in NIR */ case MESA_SHADER_TESS_EVAL: - if (ctx->args->options->key.vs_common_out.as_es) + if (ctx->args->shader_info->tes.as_es) break; /* Lowered in NIR */ - else if (ctx->args->options->key.vs_common_out.as_ngg) + else if (ctx->args->shader_info->is_ngg) break; else handle_vs_outputs_post(ctx, ctx->args->options->key.vs_common_out.export_prim_id, @@ -2248,13 +2248,13 @@ ac_nir_eliminate_const_vs_outputs(struct radv_shader_context *ctx) case MESA_SHADER_GEOMETRY: return; case MESA_SHADER_VERTEX: - if (ctx->args->options->key.vs_common_out.as_ls || - ctx->args->options->key.vs_common_out.as_es) + if (ctx->args->shader_info->vs.as_ls || + ctx->args->shader_info->vs.as_es) return; outinfo = &ctx->args->shader_info->vs.outinfo; break; case MESA_SHADER_TESS_EVAL: - if (ctx->args->options->key.vs_common_out.as_es) + if (ctx->args->shader_info->tes.as_es) return; outinfo = &ctx->args->shader_info->tes.outinfo; break; @@ -2270,7 +2270,9 @@ static void ac_setup_rings(struct radv_shader_context *ctx) { if (ctx->args->options->chip_class <= GFX8 && - (ctx->stage == MESA_SHADER_GEOMETRY || ctx->args->options->key.vs_common_out.as_es)) { + (ctx->stage == MESA_SHADER_GEOMETRY || + (ctx->stage == MESA_SHADER_VERTEX && ctx->args->shader_info->vs.as_es) || + (ctx->stage == MESA_SHADER_TESS_EVAL && ctx->args->shader_info->tes.as_es))) { unsigned ring = ctx->stage == MESA_SHADER_GEOMETRY ? RING_ESGS_GS : RING_ESGS_VS; LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, ring, false); @@ -2419,7 +2421,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co ctx.max_workgroup_size = args->shader_info->workgroup_size; if (ctx.ac.chip_class >= GFX10) { - if (is_pre_gs_stage(shaders[0]->info.stage) && args->options->key.vs_common_out.as_ngg) { + if (is_pre_gs_stage(shaders[0]->info.stage) && args->shader_info->is_ngg) { ctx.max_workgroup_size = 128; } } @@ -2439,7 +2441,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co ctx.abi.adjust_frag_coord_z = args->options->adjust_frag_coord_z; ctx.abi.robust_buffer_access = args->options->robust_buffer_access; - bool is_ngg = is_pre_gs_stage(shaders[0]->info.stage) && args->options->key.vs_common_out.as_ngg; + bool is_ngg = is_pre_gs_stage(shaders[0]->info.stage) && args->shader_info->is_ngg; if (shader_count >= 2 || is_ngg) ac_init_exec_full_mask(&ctx.ac); @@ -2479,7 +2481,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co for (int i = 0; i < 4; i++) { ctx.gs_next_vertex[i] = ac_build_alloca(&ctx.ac, ctx.ac.i32, ""); } - if (args->options->key.vs_common_out.as_ngg) { + if (args->shader_info->is_ngg) { for (unsigned i = 0; i < 4; ++i) { ctx.gs_curprim_verts[i] = ac_build_alloca(&ctx.ac, ctx.ac.i32, ""); ctx.gs_generated_prims[i] = ac_build_alloca(&ctx.ac, ctx.ac.i32, ""); @@ -2508,7 +2510,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co } if (shaders[shader_idx]->info.stage == MESA_SHADER_VERTEX && - args->options->key.vs_common_out.as_ngg && + args->shader_info->is_ngg && args->options->key.vs_common_out.export_prim_id) { declare_esgs_ring(&ctx); } @@ -2517,7 +2519,7 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co if (shader_idx) { if (shaders[shader_idx]->info.stage == MESA_SHADER_GEOMETRY && - args->options->key.vs_common_out.as_ngg) { + args->shader_info->is_ngg) { gfx10_ngg_gs_emit_prologue(&ctx); nested_barrier = false; } else { @@ -2581,10 +2583,10 @@ ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, struct nir_shader *co /* This needs to be outside the if wrapping the shader body, as sometimes * the HW generates waves with 0 es/vs threads. */ if (is_pre_gs_stage(shaders[shader_idx]->info.stage) && - args->options->key.vs_common_out.as_ngg && shader_idx == shader_count - 1) { + args->shader_info->is_ngg && shader_idx == shader_count - 1) { handle_ngg_outputs_post_2(&ctx); } else if (shaders[shader_idx]->info.stage == MESA_SHADER_GEOMETRY && - args->options->key.vs_common_out.as_ngg) { + args->shader_info->is_ngg) { gfx10_ngg_gs_emit_epilogue_2(&ctx); } } diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c index 625c7a46e45..62aabfc0f1e 100644 --- a/src/amd/vulkan/radv_shader_args.c +++ b/src/amd/vulkan/radv_shader_args.c @@ -78,13 +78,13 @@ needs_view_index_sgpr(struct radv_shader_args *args, gl_shader_stage stage) switch (stage) { case MESA_SHADER_VERTEX: if (args->shader_info->needs_multiview_view_index || - (!args->options->key.vs_common_out.as_es && !args->options->key.vs_common_out.as_ls && + (!args->shader_info->vs.as_es && !args->shader_info->vs.as_ls && args->options->key.has_multiview_view_index)) return true; break; case MESA_SHADER_TESS_EVAL: if (args->shader_info->needs_multiview_view_index || - (!args->options->key.vs_common_out.as_es && args->options->key.has_multiview_view_index)) + (!args->shader_info->tes.as_es && args->options->key.has_multiview_view_index)) return true; break; case MESA_SHADER_TESS_CTRL: @@ -93,7 +93,7 @@ needs_view_index_sgpr(struct radv_shader_args *args, gl_shader_stage stage) break; case MESA_SHADER_GEOMETRY: if (args->shader_info->needs_multiview_view_index || - (args->options->key.vs_common_out.as_ngg && args->options->key.has_multiview_view_index)) + (args->shader_info->is_ngg && args->options->key.has_multiview_view_index)) return true; break; default: @@ -199,7 +199,7 @@ allocate_user_sgprs(struct radv_shader_args *args, gl_shader_stage stage, bool h case MESA_SHADER_VERTEX: if (!args->is_gs_copy_shader) user_sgpr_count += count_vs_user_sgprs(args); - if (args->options->key.vs_common_out.as_ngg) + if (args->shader_info->is_ngg) user_sgpr_count += count_ngg_sgprs(args, stage); break; case MESA_SHADER_TESS_CTRL: @@ -209,12 +209,12 @@ allocate_user_sgprs(struct radv_shader_args *args, gl_shader_stage stage, bool h } break; case MESA_SHADER_TESS_EVAL: - if (args->options->key.vs_common_out.as_ngg) + if (args->shader_info->is_ngg) user_sgpr_count += count_ngg_sgprs(args, stage); break; case MESA_SHADER_GEOMETRY: if (has_previous_stage) { - if (args->options->key.vs_common_out.as_ngg) + if (args->shader_info->is_ngg) user_sgpr_count += count_ngg_sgprs(args, stage); if (previous_stage == MESA_SHADER_VERTEX) { @@ -307,7 +307,7 @@ declare_vs_input_vgprs(struct radv_shader_args *args) { ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vertex_id); if (!args->is_gs_copy_shader) { - if (args->options->key.vs_common_out.as_ls) { + if (args->shader_info->vs.as_ls) { ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_rel_patch_id); if (args->options->chip_class >= GFX10) { ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ @@ -318,7 +318,7 @@ declare_vs_input_vgprs(struct radv_shader_args *args) } } else { if (args->options->chip_class >= GFX10) { - if (args->options->key.vs_common_out.as_ngg) { + if (args->shader_info->is_ngg) { ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); @@ -467,7 +467,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, bool needs_view_index = needs_view_index_sgpr(args, stage); if (args->options->chip_class >= GFX10) { - if (is_pre_gs_stage(stage) && args->options->key.vs_common_out.as_ngg) { + if (is_pre_gs_stage(stage) && args->shader_info->is_ngg) { /* On GFX10, VS is merged into GS for NGG. */ previous_stage = stage; stage = MESA_SHADER_GEOMETRY; @@ -528,9 +528,9 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index); } - if (args->options->key.vs_common_out.as_es) { + if (args->shader_info->vs.as_es) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset); - } else if (args->options->key.vs_common_out.as_ls) { + } else if (args->shader_info->vs.as_ls) { /* no extra parameters */ } else { declare_streamout_sgprs(args, stage); @@ -539,7 +539,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, if (args->options->explicit_scratch_args) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); } - if (args->options->key.vs_common_out.as_ngg) { + if (args->shader_info->is_ngg) { declare_ngg_sgprs(args, stage); } @@ -590,7 +590,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, if (needs_view_index) ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index); - if (args->options->key.vs_common_out.as_es) { + if (args->shader_info->tes.as_es) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset); @@ -601,7 +601,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, if (args->options->explicit_scratch_args) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); } - if (args->options->key.vs_common_out.as_ngg) { + if (args->shader_info->is_ngg) { declare_ngg_sgprs(args, stage); } declare_tes_input_vgprs(args); @@ -609,7 +609,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, case MESA_SHADER_GEOMETRY: if (has_previous_stage) { // First 6 system regs - if (args->options->key.vs_common_out.as_ngg) { + if (args->shader_info->is_ngg) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_tg_info); } else { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs2vs_offset); @@ -632,7 +632,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index); } - if (args->options->key.vs_common_out.as_ngg) { + if (args->shader_info->is_ngg) { declare_ngg_sgprs(args, stage); } @@ -729,7 +729,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, set_vs_specific_input_locs(args, stage, has_previous_stage, previous_stage, &user_sgpr_idx); if (args->ac.view_index.used) set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1); - if (args->options->key.vs_common_out.as_ngg) + if (args->shader_info->is_ngg) set_ngg_sgprs_locs(args, stage, &user_sgpr_idx); break; case MESA_SHADER_TESS_CTRL: @@ -740,7 +740,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, case MESA_SHADER_TESS_EVAL: if (args->ac.view_index.used) set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1); - if (args->options->key.vs_common_out.as_ngg) + if (args->shader_info->is_ngg) set_ngg_sgprs_locs(args, stage, &user_sgpr_idx); break; case MESA_SHADER_GEOMETRY: @@ -752,7 +752,7 @@ radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage, if (args->ac.view_index.used) set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1); - if (args->options->key.vs_common_out.as_ngg) + if (args->shader_info->is_ngg) set_ngg_sgprs_locs(args, stage, &user_sgpr_idx); break; case MESA_SHADER_FRAGMENT: