iris: drop cache coherent cpu mapping for external BO

We have to assume any external buffer could be used by the display HW.
In the case that buffer is also CPU mapped, we want to assume no cache
coherency as it is only available between GT & CPU, not display.

Many thanks to Michel Dänzer for the hint!

v2: Move cache coherent drop to bufmgr (Chris)

v3: Also make BO external if created with PIPE_BIND_SHARED (Eric)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2552
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4533>
This commit is contained in:
Lionel Landwerlin
2020-04-13 18:14:24 +03:00
committed by Marge Bot
parent 08a396033b
commit 8ce46f352e
3 changed files with 19 additions and 1 deletions

View File

@@ -1376,12 +1376,17 @@ iris_bo_make_external_locked(struct iris_bo *bo)
{
if (!bo->external) {
_mesa_hash_table_insert(bo->bufmgr->handle_table, &bo->gem_handle, bo);
/* If a BO is going to be used externally, it could be sent to the
* display HW. So make sure our CPU mappings don't assume cache
* coherency since display is outside that cache.
*/
bo->cache_coherent = false;
bo->external = true;
bo->reusable = false;
}
}
static void
void
iris_bo_make_external(struct iris_bo *bo)
{
struct iris_bufmgr *bufmgr = bo->bufmgr;

View File

@@ -309,6 +309,13 @@ int iris_bo_get_tiling(struct iris_bo *bo, uint32_t *tiling_mode,
*/
int iris_bo_flink(struct iris_bo *bo, uint32_t *name);
/**
* Make a BO externally accessible.
*
* \param bo Buffer to make external
*/
void iris_bo_make_external(struct iris_bo *bo);
/**
* Returns 1 if mapping the buffer for write could cause the process
* to block, due to the object being active in the GPU.

View File

@@ -801,6 +801,9 @@ iris_resource_create_for_buffer(struct pipe_screen *pscreen,
return NULL;
}
if (templ->bind & PIPE_BIND_SHARED)
iris_bo_make_external(res->bo);
return &res->base;
}
@@ -924,6 +927,9 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
map_aux_addresses(screen, res);
}
if (templ->bind & PIPE_BIND_SHARED)
iris_bo_make_external(res->bo);
return &res->base;
fail: