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mesa: move gl_program::is_arb_asm to shader_info

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This will be used from radeonsi in the next commit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11972>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2021-07-16 11:42:42 +02:00
committed by Marge Bot
parent bff8a948f7
commit 8cd2e82c89
7 changed files with 21 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/compiler/glsl/standalone.cpp
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@@ -103,7 +103,7 @@ init_gl_program(struct gl_program *prog, bool is_arb_asm, gl_shader_stage stage)
{
prog->RefCount = 1;
prog->Format = GL_PROGRAM_FORMAT_ASCII_ARB;
prog->is_arb_asm = is_arb_asm;
prog->info.is_arb_asm = is_arb_asm;
prog->info.stage = stage;
}

5
src/compiler/shader_info.h
View File

@@ -271,6 +271,11 @@ typedef struct shader_info {
*/
bool workgroup_size_variable:1;
/**
* Is this an ARB assembly-style program.
*/
bool is_arb_asm;
union {
struct {
/* Which inputs are doubles */

10
src/mesa/drivers/dri/i965/brw_vs.c
View File

@@ -124,7 +124,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
memset(&prog_data, 0, sizeof(prog_data));
/* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
if (vp->program.is_arb_asm)
if (vp->program.info.is_arb_asm)
stage_prog_data->use_alt_mode = true;
mem_ctx = ralloc_context(NULL);
@@ -134,7 +134,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
brw_assign_common_binding_table_offsets(devinfo, &vp->program,
&prog_data.base.base, 0);
if (!vp->program.is_arb_asm) {
if (!vp->program.info.is_arb_asm) {
brw_nir_setup_glsl_uniforms(mem_ctx, nir, &vp->program,
&prog_data.base.base,
compiler->scalar_stage[MESA_SHADER_VERTEX]);
@@ -173,7 +173,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
}
if (INTEL_DEBUG & DEBUG_VS) {
if (vp->program.is_arb_asm)
if (vp->program.info.is_arb_asm)
brw_dump_arb_asm("vertex", &vp->program);
}
@@ -191,12 +191,12 @@ brw_codegen_vs_prog(struct brw_context *brw,
params.shader_time = true;
params.shader_time_index =
brw_get_shader_time_index(brw, &vp->program, ST_VS,
!vp->program.is_arb_asm);
!vp->program.info.is_arb_asm);
}
program = brw_compile_vs(compiler, mem_ctx, &params);
if (program == NULL) {
if (!vp->program.is_arb_asm) {
if (!vp->program.info.is_arb_asm) {
vp->program.sh.data->LinkStatus = LINKING_FAILURE;
ralloc_strcat(&vp->program.sh.data->InfoLog, params.error_str);
}

14
src/mesa/drivers/dri/i965/brw_wm.c
View File

@@ -86,12 +86,12 @@ brw_codegen_wm_prog(struct brw_context *brw,
memset(&prog_data, 0, sizeof(prog_data));
/* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
if (fp->program.is_arb_asm)
if (fp->program.info.is_arb_asm)
prog_data.base.use_alt_mode = true;
assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
if (!fp->program.is_arb_asm) {
if (!fp->program.info.is_arb_asm) {
brw_nir_setup_glsl_uniforms(mem_ctx, nir, &fp->program,
&prog_data.base, true);
if (brw->can_push_ubos) {
@@ -126,19 +126,19 @@ brw_codegen_wm_prog(struct brw_context *brw,
params.shader_time = true;
params.shader_time_index8 =
brw_get_shader_time_index(brw, &fp->program, ST_FS8,
!fp->program.is_arb_asm);
!fp->program.info.is_arb_asm);
params.shader_time_index16 =
brw_get_shader_time_index(brw, &fp->program, ST_FS16,
!fp->program.is_arb_asm);
!fp->program.info.is_arb_asm);
params.shader_time_index32 =
brw_get_shader_time_index(brw, &fp->program, ST_FS32,
!fp->program.is_arb_asm);
!fp->program.info.is_arb_asm);
}
program = brw_compile_fs(brw->screen->compiler, mem_ctx, &params);
if (program == NULL) {
if (!fp->program.is_arb_asm) {
if (!fp->program.info.is_arb_asm) {
fp->program.sh.data->LinkStatus = LINKING_FAILURE;
ralloc_strcat(&fp->program.sh.data->InfoLog, params.error_str);
}
@@ -164,7 +164,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
brw_alloc_stage_scratch(brw, &brw->wm.base, prog_data.base.total_scratch);
if (((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
if (((INTEL_DEBUG & DEBUG_WM) && fp->program.info.is_arb_asm))
fprintf(stderr, "\n");
/* The param and pull_param arrays will be freed by the shader cache. */

2
src/mesa/main/mtypes.h
View File

@@ -2138,8 +2138,6 @@ struct gl_program
void *driver_cache_blob;
size_t driver_cache_blob_size;
bool is_arb_asm; /** Is this an ARB assembly-style program */
/** Is this program written to on disk shader cache */
bool program_written_to_cache;

4
src/mesa/program/ir_to_mesa.cpp
View File

@@ -2500,7 +2500,7 @@ _mesa_associate_uniform_storage(struct gl_context *ctx,
unsigned columns = 0;
int dmul;
if (ctx->Const.PackedDriverUniformStorage && !prog->is_arb_asm) {
if (ctx->Const.PackedDriverUniformStorage && !prog->info.is_arb_asm) {
dmul = storage->type->vector_elements * sizeof(float);
} else {
dmul = 4 * sizeof(float);
@@ -2593,7 +2593,7 @@ _mesa_associate_uniform_storage(struct gl_context *ctx,
* initializers in the source code to be copied over.
*/
unsigned array_elements = MAX2(1, storage->array_elements);
if (ctx->Const.PackedDriverUniformStorage && !prog->is_arb_asm &&
if (ctx->Const.PackedDriverUniformStorage && !prog->info.is_arb_asm &&
(storage->is_bindless || !storage->type->contains_opaque())) {
const int dmul = storage->type->is_64bit() ? 2 : 1;
const unsigned components =

2
src/mesa/program/program.c
View File

@@ -194,7 +194,7 @@ _mesa_init_gl_program(struct gl_program *prog, gl_shader_stage stage,
prog->RefCount = 1;
prog->Format = GL_PROGRAM_FORMAT_ASCII_ARB;
prog->info.stage = stage;
prog->is_arb_asm = is_arb_asm;
prog->info.is_arb_asm = is_arb_asm;
/* Uniforms that lack an initializer in the shader code have an initial
* value of zero. This includes sampler uniforms.