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vulkan: Take a VkPipelineCreateFlags2KHR in vk_pipeline_*shader_stage*()

Browse Source 
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30876>
This commit is contained in:
Faith Ekstrand
2024-08-26 17:29:59 -05:00
committed by Marge Bot
parent 81a00a48bc
commit 8c60f1461b
16 changed files with 103 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/amd/vulkan/radv_pipeline.c
View File

@@ -171,7 +171,8 @@ radv_pipeline_get_shader_key(const struct radv_device *device, const VkPipelineS
}
void
radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo,
radv_pipeline_stage_init(VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *sinfo,
const struct radv_pipeline_layout *pipeline_layout,
const struct radv_shader_stage_key *stage_key, struct radv_shader_stage *out_stage)
{
@@ -207,7 +208,7 @@ radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo,
radv_shader_layout_init(pipeline_layout, out_stage->stage, &out_stage->layout);
vk_pipeline_hash_shader_stage(sinfo, NULL, out_stage->shader_sha1);
vk_pipeline_hash_shader_stage(pipeline_flags, sinfo, NULL, out_stage->shader_sha1);
}
void
@@ -1273,12 +1274,13 @@ radv_pipeline_hash(const struct radv_device *device, const struct radv_pipeline_
}
void
radv_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *sinfo,
radv_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *sinfo,
const struct radv_shader_stage_key *stage_key, struct mesa_sha1 *ctx)
{
unsigned char shader_sha1[SHA1_DIGEST_LENGTH];
vk_pipeline_hash_shader_stage(sinfo, NULL, shader_sha1);
vk_pipeline_hash_shader_stage(pipeline_flags, sinfo, NULL, shader_sha1);
_mesa_sha1_update(ctx, shader_sha1, sizeof(shader_sha1));
_mesa_sha1_update(ctx, stage_key, sizeof(*stage_key));

6
src/amd/vulkan/radv_pipeline.h
View File

@@ -85,7 +85,8 @@ struct radv_shader_stage_key radv_pipeline_get_shader_key(const struct radv_devi
const VkPipelineShaderStageCreateInfo *stage,
VkPipelineCreateFlags2KHR flags, const void *pNext);
void radv_pipeline_stage_init(const VkPipelineShaderStageCreateInfo *sinfo, const struct radv_pipeline_layout *layout,
void radv_pipeline_stage_init(VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *sinfo, const struct radv_pipeline_layout *layout,
const struct radv_shader_stage_key *stage_key, struct radv_shader_stage *out_stage);
void radv_shader_layout_init(const struct radv_pipeline_layout *pipeline_layout, gl_shader_stage stage,
@@ -103,7 +104,8 @@ VkPipelineShaderStageCreateInfo *radv_copy_shader_stage_create_info(struct radv_
void radv_pipeline_hash(const struct radv_device *device, const struct radv_pipeline_layout *pipeline_layout,
struct mesa_sha1 *ctx);
void radv_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *sinfo,
void radv_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *sinfo,
const struct radv_shader_stage_key *stage_key, struct mesa_sha1 *ctx);
#endif /* RADV_PIPELINE_H */

4
src/amd/vulkan/radv_pipeline_compute.c
View File

@@ -168,7 +168,7 @@ radv_compute_pipeline_hash(const struct radv_device *device, const VkComputePipe
_mesa_sha1_init(&ctx);
radv_pipeline_hash(device, pipeline_layout, &ctx);
radv_pipeline_hash_shader_stage(sinfo, &stage_key, &ctx);
radv_pipeline_hash_shader_stage(create_flags, sinfo, &stage_key, &ctx);
_mesa_sha1_final(&ctx, hash);
}
@@ -218,7 +218,7 @@ radv_compute_pipeline_compile(const VkComputePipelineCreateInfo *pCreateInfo, st
const struct radv_shader_stage_key stage_key =
radv_pipeline_get_shader_key(device, &pCreateInfo->stage, pipeline->base.create_flags, pCreateInfo->pNext);
radv_pipeline_stage_init(pStage, pipeline_layout, &stage_key, &cs_stage);
radv_pipeline_stage_init(pipeline->base.create_flags, pStage, pipeline_layout, &stage_key, &cs_stage);
pipeline->base.shaders[MESA_SHADER_COMPUTE] = radv_compile_cs(
device, cache, &cs_stage, keep_executable_info, keep_statistic_info, pipeline->base.is_internal, &cs_binary);

5
src/amd/vulkan/radv_pipeline_graphics.c
View File

@@ -2228,7 +2228,8 @@ radv_pipeline_import_retained_shaders(const struct radv_device *device, struct r
const VkPipelineShaderStageCreateInfo *sinfo = &lib->stages[i];
gl_shader_stage s = vk_to_mesa_shader_stage(sinfo->stage);
radv_pipeline_stage_init(sinfo, &lib->layout, &lib->stage_keys[s], &stages[s]);
radv_pipeline_stage_init(lib->base.base.create_flags, sinfo,
&lib->layout, &lib->stage_keys[s], &stages[s]);
}
/* Import the NIR shaders (after SPIRV->NIR). */
@@ -2661,7 +2662,7 @@ radv_generate_graphics_pipeline_state(struct radv_device *device, const VkGraphi
const VkPipelineShaderStageCreateInfo *sinfo = &pCreateInfo->pStages[i];
gl_shader_stage stage = vk_to_mesa_shader_stage(sinfo->stage);
radv_pipeline_stage_init(sinfo, &gfx_state->layout, &gfx_state->key.stage_info[stage],
radv_pipeline_stage_init(create_flags, sinfo, &gfx_state->layout, &gfx_state->key.stage_info[stage],
&gfx_state->stages[stage]);
}

12
src/amd/vulkan/radv_pipeline_rt.c
View File

@@ -286,7 +286,9 @@ radv_rt_fill_stage_info(const VkRayTracingPipelineCreateInfoKHR *pCreateInfo, st
}
static void
radv_init_rt_stage_hashes(const struct radv_device *device, const VkRayTracingPipelineCreateInfoKHR *pCreateInfo,
radv_init_rt_stage_hashes(const struct radv_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkRayTracingPipelineCreateInfoKHR *pCreateInfo,
struct radv_ray_tracing_stage *stages, const struct radv_shader_stage_key *stage_keys)
{
for (uint32_t idx = 0; idx < pCreateInfo->stageCount; idx++) {
@@ -295,7 +297,7 @@ radv_init_rt_stage_hashes(const struct radv_device *device, const VkRayTracingPi
struct mesa_sha1 ctx;
_mesa_sha1_init(&ctx);
radv_pipeline_hash_shader_stage(sinfo, &stage_keys[s], &ctx);
radv_pipeline_hash_shader_stage(pipeline_flags, sinfo, &stage_keys[s], &ctx);
_mesa_sha1_final(&ctx, stages[idx].sha1);
}
}
@@ -586,7 +588,8 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
struct radv_shader_stage *stage = &stages[i];
gl_shader_stage s = vk_to_mesa_shader_stage(pCreateInfo->pStages[i].stage);
radv_pipeline_stage_init(&pCreateInfo->pStages[i], pipeline_layout, &stage_keys[s], stage);
radv_pipeline_stage_init(pipeline->base.base.create_flags, &pCreateInfo->pStages[i],
pipeline_layout, &stage_keys[s], stage);
/* precompile the shader */
stage->nir = radv_shader_spirv_to_nir(device, stage, NULL, false);
@@ -974,7 +977,8 @@ radv_generate_ray_tracing_state_key(struct radv_device *device, const VkRayTraci
radv_generate_rt_shaders_key(device, pCreateInfo, rt_state->stage_keys);
radv_init_rt_stage_hashes(device, pCreateInfo, rt_state->stages, rt_state->stage_keys);
VkPipelineCreateFlags2KHR create_flags = vk_rt_pipeline_create_flags(pCreateInfo);
radv_init_rt_stage_hashes(device, create_flags, pCreateInfo, rt_state->stages, rt_state->stage_keys);
result = radv_rt_fill_group_info(device, pCreateInfo, rt_state->stages, rt_state->groups);
if (result != VK_SUCCESS)

9
src/broadcom/vulkan/v3dv_pipeline.c
View File

@@ -69,7 +69,7 @@ pipeline_compute_sha1_from_nir(struct v3dv_pipeline_stage *p_stage)
.stage = mesa_to_vk_shader_stage(p_stage->nir->info.stage),
};
vk_pipeline_hash_shader_stage(&info, NULL, p_stage->shader_sha1);
vk_pipeline_hash_shader_stage(0, &info, NULL, p_stage->shader_sha1);
}
void
@@ -367,6 +367,7 @@ shader_module_compile_to_nir(struct v3dv_device *device,
* so we don't have to call it here.
*/
VkResult result = vk_pipeline_shader_stage_to_nir(&device->vk,
stage->pipeline->flags,
&stage_info,
&default_spirv_options,
nir_options,
@@ -2413,7 +2414,8 @@ pipeline_compile_graphics(struct v3dv_pipeline *pipeline,
vk_pipeline_robustness_state_fill(&device->vk, &p_stage->robustness,
pCreateInfo->pNext, sinfo->pNext);
vk_pipeline_hash_shader_stage(&pCreateInfo->pStages[i],
vk_pipeline_hash_shader_stage(pipeline->flags,
&pCreateInfo->pStages[i],
&p_stage->robustness,
p_stage->shader_sha1);
@@ -3156,7 +3158,8 @@ pipeline_compile_compute(struct v3dv_pipeline *pipeline,
vk_pipeline_robustness_state_fill(&device->vk, &p_stage->robustness,
info->pNext, sinfo->pNext);
vk_pipeline_hash_shader_stage(&info->stage,
vk_pipeline_hash_shader_stage(pipeline->flags,
&info->stage,
&p_stage->robustness,
p_stage->shader_sha1);

20
src/freedreno/vulkan/tu_pipeline.cc
View File

@@ -1441,6 +1441,7 @@ tu_append_executable(struct tu_pipeline *pipeline,
static void
tu_hash_stage(struct mesa_sha1 *ctx,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage,
const nir_shader *nir,
const struct tu_shader_key *key)
@@ -1454,7 +1455,7 @@ tu_hash_stage(struct mesa_sha1 *ctx,
blob_finish(&blob);
} else {
unsigned char stage_hash[SHA1_DIGEST_LENGTH];
vk_pipeline_hash_shader_stage(stage, NULL, stage_hash);
vk_pipeline_hash_shader_stage(pipeline_flags, stage, NULL, stage_hash);
_mesa_sha1_update(ctx, stage_hash, sizeof(stage_hash));
}
_mesa_sha1_update(ctx, key, sizeof(*key));
@@ -1473,6 +1474,7 @@ tu_hash_compiler(struct mesa_sha1 *ctx, const struct ir3_compiler *compiler)
static void
tu_hash_shaders(unsigned char *hash,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo **stages,
nir_shader *const *nir,
const struct tu_pipeline_layout *layout,
@@ -1489,7 +1491,7 @@ tu_hash_shaders(unsigned char *hash,
for (int i = 0; i < MESA_SHADER_STAGES; ++i) {
if (stages[i] || nir[i]) {
tu_hash_stage(&ctx, stages[i], nir[i], &keys[i]);
tu_hash_stage(&ctx, pipeline_flags, stages[i], nir[i], &keys[i]);
}
}
_mesa_sha1_update(&ctx, &state, sizeof(state));
@@ -1499,6 +1501,7 @@ tu_hash_shaders(unsigned char *hash,
static void
tu_hash_compute(unsigned char *hash,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage,
const struct tu_pipeline_layout *layout,
const struct tu_shader_key *key,
@@ -1511,7 +1514,7 @@ tu_hash_compute(unsigned char *hash,
if (layout)
_mesa_sha1_update(&ctx, layout->sha1, sizeof(layout->sha1));
tu_hash_stage(&ctx, stage, NULL, key);
tu_hash_stage(&ctx, pipeline_flags, stage, NULL, key);
tu_hash_compiler(&ctx, compiler);
_mesa_sha1_final(&ctx, hash);
@@ -1786,8 +1789,8 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder,
}
unsigned char pipeline_sha1[20];
tu_hash_shaders(pipeline_sha1, stage_infos, nir, &builder->layout, keys,
builder->state, compiler);
tu_hash_shaders(pipeline_sha1, builder->create_flags, stage_infos, nir,
&builder->layout, keys, builder->state, compiler);
unsigned char nir_sha1[21];
memcpy(nir_sha1, pipeline_sha1, sizeof(pipeline_sha1));
@@ -1847,6 +1850,7 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder,
}
result = tu_compile_shaders(builder->device,
builder->create_flags,
stage_infos,
nir,
keys,
@@ -4254,7 +4258,7 @@ tu_compute_pipeline_create(VkDevice device,
void *pipeline_mem_ctx = ralloc_context(NULL);
unsigned char pipeline_sha1[20];
tu_hash_compute(pipeline_sha1, stage_info, layout, &key, dev->compiler);
tu_hash_compute(pipeline_sha1, flags, stage_info, layout, &key, dev->compiler);
struct tu_shader *shader = NULL;
@@ -4285,8 +4289,8 @@ tu_compute_pipeline_create(VkDevice device,
struct ir3_shader_key ir3_key = {};
nir_shader *nir = tu_spirv_to_nir(dev, pipeline_mem_ctx, stage_info,
MESA_SHADER_COMPUTE);
nir_shader *nir = tu_spirv_to_nir(dev, pipeline_mem_ctx, flags,
stage_info, MESA_SHADER_COMPUTE);
nir_initial_disasm = executable_info ?
nir_shader_as_str(nir, pipeline->base.executables_mem_ctx) : NULL;

10
src/freedreno/vulkan/tu_shader.cc
View File

@@ -27,6 +27,7 @@
nir_shader *
tu_spirv_to_nir(struct tu_device *dev,
void *mem_ctx,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage_info,
gl_shader_stage stage)
{
@@ -59,8 +60,9 @@ tu_spirv_to_nir(struct tu_device *dev,
nir_shader *nir;
VkResult result =
vk_pipeline_shader_stage_to_nir(&dev->vk, stage_info, &spirv_options,
nir_options, mem_ctx, &nir);
vk_pipeline_shader_stage_to_nir(&dev->vk, pipeline_flags, stage_info,
&spirv_options, nir_options,
mem_ctx, &nir);
if (result != VK_SUCCESS)
return NULL;
@@ -2637,6 +2639,7 @@ tu6_get_tessmode(const struct nir_shader *shader)
VkResult
tu_compile_shaders(struct tu_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo **stage_infos,
nir_shader **nir,
const struct tu_shader_key *keys,
@@ -2660,7 +2663,8 @@ tu_compile_shaders(struct tu_device *device,
int64_t stage_start = os_time_get_nano();
nir[stage] = tu_spirv_to_nir(device, mem_ctx, stage_info, stage);
nir[stage] = tu_spirv_to_nir(device, mem_ctx, pipeline_flags,
stage_info, stage);
if (!nir[stage]) {
result = VK_ERROR_OUT_OF_HOST_MEMORY;
goto fail;

2
src/freedreno/vulkan/tu_shader.h
View File

@@ -115,6 +115,7 @@ tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, struct tu_device *dev);
nir_shader *
tu_spirv_to_nir(struct tu_device *dev,
void *mem_ctx,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage_info,
gl_shader_stage stage);
@@ -166,6 +167,7 @@ tu_shader_key_subgroup_size(struct tu_shader_key *key,
VkResult
tu_compile_shaders(struct tu_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo **stage_infos,
nir_shader **nir,
const struct tu_shader_key *keys,

11
src/gallium/frontends/lavapipe/lvp_pipeline.c
View File

@@ -289,7 +289,10 @@ lvp_create_pipeline_nir(nir_shader *nir)
}
static VkResult
compile_spirv(struct lvp_device *pdevice, const VkPipelineShaderStageCreateInfo *sinfo, nir_shader **nir)
compile_spirv(struct lvp_device *pdevice,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *sinfo,
nir_shader **nir)
{
gl_shader_stage stage = vk_to_mesa_shader_stage(sinfo->stage);
assert(stage <= LVP_SHADER_STAGES && stage != MESA_SHADER_NONE);
@@ -313,7 +316,7 @@ compile_spirv(struct lvp_device *pdevice, const VkPipelineShaderStageCreateInfo
#endif
};
result = vk_pipeline_shader_stage_to_nir(&pdevice->vk, sinfo,
result = vk_pipeline_shader_stage_to_nir(&pdevice->vk, pipeline_flags, sinfo,
&spirv_options, pdevice->physical_device->drv_options[stage],
NULL, nir);
return result;
@@ -472,7 +475,7 @@ VkResult
lvp_spirv_to_nir(struct lvp_pipeline *pipeline, const VkPipelineShaderStageCreateInfo *sinfo,
nir_shader **out_nir)
{
VkResult result = compile_spirv(pipeline->device, sinfo, out_nir);
VkResult result = compile_spirv(pipeline->device, pipeline->flags, sinfo, out_nir);
if (result == VK_SUCCESS)
lvp_shader_lower(pipeline->device, pipeline, *out_nir, pipeline->layout);
@@ -1201,7 +1204,7 @@ create_shader_object(struct lvp_device *device, const VkShaderCreateInfoEXT *pCr
pCreateInfo->pName,
pCreateInfo->pSpecializationInfo,
};
VkResult result = compile_spirv(device, &sinfo, &nir);
VkResult result = compile_spirv(device, 0, &sinfo, &nir);
if (result != VK_SUCCESS)
goto fail;
nir->info.separate_shader = true;

13
src/intel/vulkan/anv_pipeline.c
View File

@@ -132,6 +132,7 @@ anv_nir_lower_set_vtx_and_prim_count(nir_shader *nir)
*/
static nir_shader *
anv_shader_stage_to_nir(struct anv_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage_info,
enum brw_robustness_flags robust_flags,
void *mem_ctx)
@@ -160,7 +161,7 @@ anv_shader_stage_to_nir(struct anv_device *device,
nir_shader *nir;
VkResult result =
vk_pipeline_shader_stage_to_nir(&device->vk, stage_info,
vk_pipeline_shader_stage_to_nir(&device->vk, pipeline_flags, stage_info,
&spirv_options, nir_options,
mem_ctx, &nir);
if (result != VK_SUCCESS)
@@ -309,6 +310,7 @@ void anv_DestroyPipeline(
struct anv_pipeline_stage {
gl_shader_stage stage;
VkPipelineCreateFlags2KHR pipeline_flags;
struct vk_pipeline_robustness_state rstate;
/* VkComputePipelineCreateInfo, VkGraphicsPipelineCreateInfo or
@@ -657,7 +659,8 @@ anv_stage_write_shader_hash(struct anv_pipeline_stage *stage,
stage->pipeline_pNext,
stage->info->pNext);
vk_pipeline_hash_shader_stage(stage->info, &stage->rstate, stage->shader_sha1);
vk_pipeline_hash_shader_stage(stage->pipeline_flags, stage->info,
&stage->rstate, stage->shader_sha1);
stage->robust_flags = anv_get_robust_flags(&stage->rstate);
@@ -818,7 +821,8 @@ anv_pipeline_stage_get_nir(struct anv_pipeline *pipeline,
if (vk_pipeline_shader_stage_has_identifier(stage->info))
return VK_PIPELINE_COMPILE_REQUIRED;
stage->nir = anv_shader_stage_to_nir(pipeline->device, stage->info,
stage->nir = anv_shader_stage_to_nir(pipeline->device,
stage->pipeline_flags, stage->info,
stage->key.base.robust_flags, mem_ctx);
if (stage->nir) {
anv_device_upload_nir(pipeline->device, cache,
@@ -2216,6 +2220,7 @@ anv_graphics_pipeline_compile(struct anv_graphics_base_pipeline *pipeline,
continue;
stages[stage].stage = stage;
stages[stage].pipeline_flags = pipeline->base.flags;
stages[stage].pipeline_pNext = info->pNext;
stages[stage].info = &info->pStages[i];
stages[stage].feedback_idx = shader_count++;
@@ -2650,6 +2655,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
struct anv_pipeline_stage stage = {
.stage = MESA_SHADER_COMPUTE,
.info = &info->stage,
.pipeline_flags = pipeline->base.flags,
.pipeline_pNext = info->pNext,
.cache_key = {
.stage = MESA_SHADER_COMPUTE,
@@ -3566,6 +3572,7 @@ anv_pipeline_init_ray_tracing_stages(struct anv_ray_tracing_pipeline *pipeline,
stages[i] = (struct anv_pipeline_stage) {
.stage = vk_to_mesa_shader_stage(sinfo->stage),
.pipeline_flags = pipeline->base.flags,
.pipeline_pNext = info->pNext,
.info = sinfo,
.cache_key = {

18
src/intel/vulkan_hasvk/anv_pipeline.c
View File

@@ -48,6 +48,7 @@
*/
static nir_shader *
anv_shader_stage_to_nir(struct anv_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage_info,
enum elk_robustness_flags robust_flags,
void *mem_ctx)
@@ -76,7 +77,7 @@ anv_shader_stage_to_nir(struct anv_device *device,
nir_shader *nir;
VkResult result =
vk_pipeline_shader_stage_to_nir(&device->vk, stage_info,
vk_pipeline_shader_stage_to_nir(&device->vk, pipeline_flags, stage_info,
&spirv_options, nir_options,
mem_ctx, &nir);
if (result != VK_SUCCESS)
@@ -336,6 +337,7 @@ populate_cs_prog_key(const struct anv_device *device,
struct anv_pipeline_stage {
gl_shader_stage stage;
VkPipelineCreateFlags2KHR pipeline_flags;
const VkPipelineShaderStageCreateInfo *info;
unsigned char shader_sha1[20];
@@ -440,7 +442,8 @@ anv_pipeline_stage_get_nir(struct anv_pipeline *pipeline,
return nir;
}
nir = anv_shader_stage_to_nir(pipeline->device, stage->info,
nir = anv_shader_stage_to_nir(pipeline->device,
stage->pipeline_flags, stage->info,
stage->key.base.robust_flags, mem_ctx);
if (nir) {
anv_device_upload_nir(pipeline->device, cache, nir, stage->shader_sha1);
@@ -1045,7 +1048,8 @@ anv_graphics_pipeline_init_keys(struct anv_graphics_pipeline *pipeline,
int64_t stage_start = os_time_get_nano();
vk_pipeline_hash_shader_stage(stages[s].info, NULL, stages[s].shader_sha1);
vk_pipeline_hash_shader_stage(stages[s].pipeline_flags, stages[s].info,
NULL, stages[s].shader_sha1);
const struct anv_device *device = pipeline->base.device;
enum elk_robustness_flags robust_flags = anv_device_get_robust_flags(device);
@@ -1216,6 +1220,9 @@ anv_graphics_pipeline_compile(struct anv_graphics_pipeline *pipeline,
ANV_FROM_HANDLE(anv_pipeline_layout, layout, info->layout);
VkResult result;
const VkPipelineCreateFlags2KHR pipeline_flags =
vk_graphics_pipeline_create_flags(info);
VkPipelineCreationFeedback pipeline_feedback = {
.flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT,
};
@@ -1226,6 +1233,7 @@ anv_graphics_pipeline_compile(struct anv_graphics_pipeline *pipeline,
for (uint32_t i = 0; i < info->stageCount; i++) {
gl_shader_stage stage = vk_to_mesa_shader_stage(info->pStages[i].stage);
stages[stage].stage = stage;
stages[stage].pipeline_flags = pipeline_flags;
stages[stage].info = &info->pStages[i];
}
@@ -1440,6 +1448,7 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
struct anv_pipeline_stage stage = {
.stage = MESA_SHADER_COMPUTE,
.pipeline_flags = vk_compute_pipeline_create_flags(info),
.info = &info->stage,
.cache_key = {
.stage = MESA_SHADER_COMPUTE,
@@ -1448,7 +1457,8 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
.flags = VK_PIPELINE_CREATION_FEEDBACK_VALID_BIT,
},
};
vk_pipeline_hash_shader_stage(&info->stage, NULL, stage.shader_sha1);
vk_pipeline_hash_shader_stage(stage.pipeline_flags, &info->stage,
NULL, stage.shader_sha1);
struct anv_shader_bin *bin = NULL;

15
src/microsoft/vulkan/dzn_pipeline.c
View File

@@ -216,6 +216,7 @@ dzn_pipeline_get_nir_shader(struct dzn_device *device,
const struct dzn_pipeline_layout *layout,
struct vk_pipeline_cache *cache,
const uint8_t *hash,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *stage_info,
gl_shader_stage stage,
const struct dzn_nir_options *options,
@@ -240,7 +241,7 @@ dzn_pipeline_get_nir_shader(struct dzn_device *device,
const struct spirv_to_nir_options *spirv_opts = dxil_spirv_nir_get_spirv_options();
VkResult result =
vk_pipeline_shader_stage_to_nir(&device->vk, stage_info,
vk_pipeline_shader_stage_to_nir(&device->vk, pipeline_flags, stage_info,
spirv_opts, options->nir_opts, NULL, nir);
if (result != VK_SUCCESS)
return result;
@@ -862,7 +863,7 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
enum gl_subgroup_size subgroup_enum = subgroup_size && subgroup_size->requiredSubgroupSize >= 8 ?
subgroup_size->requiredSubgroupSize : SUBGROUP_SIZE_FULL_SUBGROUPS;
vk_pipeline_hash_shader_stage(stages[stage].info, NULL, stages[stage].spirv_hash);
vk_pipeline_hash_shader_stage(pipeline->base.flags, stages[stage].info, NULL, stages[stage].spirv_hash);
_mesa_sha1_update(&pipeline_hash_ctx, &subgroup_enum, sizeof(subgroup_enum));
_mesa_sha1_update(&pipeline_hash_ctx, stages[stage].spirv_hash, sizeof(stages[stage].spirv_hash));
_mesa_sha1_update(&pipeline_hash_ctx, layout->stages[stage].hash, sizeof(layout->stages[stage].hash));
@@ -920,6 +921,7 @@ dzn_graphics_pipeline_compile_shaders(struct dzn_device *device,
struct dxil_spirv_metadata metadata = { 0 };
ret = dzn_pipeline_get_nir_shader(device, layout,
cache, stages[stage].nir_hash,
pipeline->base.flags,
stages[stage].info, stage,
&options, &metadata,
&pipeline->templates.shaders[stage].nir);
@@ -1753,10 +1755,12 @@ static void
dzn_pipeline_init(struct dzn_pipeline *pipeline,
struct dzn_device *device,
VkPipelineBindPoint type,
VkPipelineCreateFlags2KHR flags,
struct dzn_pipeline_layout *layout,
D3D12_PIPELINE_STATE_STREAM_DESC *stream_desc)
{
pipeline->type = type;
pipeline->flags = flags;
pipeline->root.sets_param_count = layout->root.sets_param_count;
pipeline->root.sysval_cbv_param_idx = layout->root.sysval_cbv_param_idx;
pipeline->root.push_constant_cbv_param_idx = layout->root.push_constant_cbv_param_idx;
@@ -1885,6 +1889,7 @@ dzn_graphics_pipeline_create(struct dzn_device *device,
dzn_pipeline_init(&pipeline->base, device,
VK_PIPELINE_BIND_POINT_GRAPHICS,
vk_graphics_pipeline_create_flags(pCreateInfo),
layout, stream_desc);
D3D12_INPUT_ELEMENT_DESC attribs[MAX_VERTEX_GENERIC_ATTRIBS] = { 0 };
enum pipe_format vi_conversions[MAX_VERTEX_GENERIC_ATTRIBS] = { 0 };
@@ -2494,7 +2499,7 @@ dzn_compute_pipeline_compile_shader(struct dzn_device *device,
struct mesa_sha1 pipeline_hash_ctx;
_mesa_sha1_init(&pipeline_hash_ctx);
vk_pipeline_hash_shader_stage(&info->stage, NULL, spirv_hash);
vk_pipeline_hash_shader_stage(pipeline->base.flags, &info->stage, NULL, spirv_hash);
_mesa_sha1_update(&pipeline_hash_ctx, &device->bindless, sizeof(device->bindless));
_mesa_sha1_update(&pipeline_hash_ctx, spirv_hash, sizeof(spirv_hash));
_mesa_sha1_update(&pipeline_hash_ctx, layout->stages[MESA_SHADER_COMPUTE].hash,
@@ -2524,7 +2529,8 @@ dzn_compute_pipeline_compile_shader(struct dzn_device *device,
};
struct dxil_spirv_metadata metadata = { 0 };
ret = dzn_pipeline_get_nir_shader(device, layout, cache, nir_hash,
&info->stage, MESA_SHADER_COMPUTE,
pipeline->base.flags, &info->stage,
MESA_SHADER_COMPUTE,
&options, &metadata, &nir);
if (ret != VK_SUCCESS)
return ret;
@@ -2597,6 +2603,7 @@ dzn_compute_pipeline_create(struct dzn_device *device,
dzn_pipeline_init(&pipeline->base, device,
VK_PIPELINE_BIND_POINT_COMPUTE,
vk_compute_pipeline_create_flags(pCreateInfo),
layout, &stream_desc);
D3D12_SHADER_BYTECODE shader = { 0 };

1
src/microsoft/vulkan/dzn_private.h
View File

@@ -910,6 +910,7 @@ static_assert(sizeof(D3D12_RASTERIZER_DESC) >= sizeof(D3D12_RASTERIZER_DESC1) &&
struct dzn_pipeline {
struct vk_object_base base;
VkPipelineBindPoint type;
VkPipelineCreateFlags2KHR flags;
struct dzn_device *device;
struct {
uint32_t sets_param_count;

11
src/vulkan/runtime/vk_pipeline.c
View File

@@ -125,6 +125,7 @@ vk_get_subgroup_size(uint32_t spirv_version,
VkResult
vk_pipeline_shader_stage_to_nir(struct vk_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *info,
const struct spirv_to_nir_options *spirv_options,
const struct nir_shader_compiler_options *nir_options,
@@ -187,7 +188,8 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device,
}
void
vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info,
vk_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *info,
const struct vk_pipeline_robustness_state *rstate,
unsigned char *stage_sha1)
{
@@ -818,7 +820,7 @@ vk_pipeline_precompile_shader(struct vk_device *device,
info->pNext);
uint8_t stage_sha1[SHA1_DIGEST_LENGTH];
vk_pipeline_hash_shader_stage(info, &rs, stage_sha1);
vk_pipeline_hash_shader_stage(pipeline_flags, info, &rs, stage_sha1);
/* This bit affects shader compilation but isn't taken into account in
* vk_pipeline_hash_shader_stage(). Re-hash the SHA1 if it's set.
@@ -852,8 +854,9 @@ vk_pipeline_precompile_shader(struct vk_device *device,
ops->get_spirv_options(device->physical, stage, &rs);
nir_shader *nir;
result = vk_pipeline_shader_stage_to_nir(device, info, &spirv_options,
nir_options, NULL, &nir);
result = vk_pipeline_shader_stage_to_nir(device, pipeline_flags, info,
&spirv_options, nir_options,
NULL, &nir);
if (result != VK_SUCCESS)
return result;

4
src/vulkan/runtime/vk_pipeline.h
View File

@@ -59,6 +59,7 @@ vk_pipeline_shader_stage_has_identifier(const VkPipelineShaderStageCreateInfo *i
VkResult
vk_pipeline_shader_stage_to_nir(struct vk_device *device,
VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *info,
const struct spirv_to_nir_options *spirv_options,
const struct nir_shader_compiler_options *nir_options,
@@ -92,7 +93,8 @@ struct vk_pipeline_robustness_state {
* vk_shader_module object.
*/
void
vk_pipeline_hash_shader_stage(const VkPipelineShaderStageCreateInfo *info,
vk_pipeline_hash_shader_stage(VkPipelineCreateFlags2KHR pipeline_flags,
const VkPipelineShaderStageCreateInfo *info,
const struct vk_pipeline_robustness_state *rstate,
unsigned char *stage_sha1);