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intel/compiler: Delete sampler key handling for planar format stuff

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i965 used these, but Gallium drivers do this lowering via a separate
nir_lower_tex call from st/mesa.  Vulkan drivers don't use these at all.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
This commit is contained in:
Kenneth Graunke
2022-12-07 22:34:40 -08:00
committed by Marge Bot
parent 88918baf5c
commit 8c2448d4e6
4 changed files with 0 additions and 36 deletions
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1
src/gallium/drivers/crocus/crocus_program.c
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@@ -160,7 +160,6 @@ crocus_populate_sampler_prog_key_data(struct crocus_context *ice,
struct crocus_sampler_view *texture = ice->state.shaders[stage].textures[s];
key->swizzles[s] = SWIZZLE_NOOP;
key->scale_factors[s] = 0.0f;
if (!texture)
continue;

15
src/intel/compiler/brw_compiler.h
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@@ -203,21 +203,6 @@ struct brw_sampler_prog_key_data {
* For Sandybridge, which shader w/a we need for gather quirks.
*/
enum gfx6_gather_sampler_wa gfx6_gather_wa[BRW_MAX_SAMPLERS];
/**
* Texture units that have a YUV image bound.
*/
uint32_t y_u_v_image_mask;
uint32_t y_uv_image_mask;
uint32_t yx_xuxv_image_mask;
uint32_t xy_uxvx_image_mask;
uint32_t ayuv_image_mask;
uint32_t xyuv_image_mask;
uint32_t bt709_mask;
uint32_t bt2020_mask;
/* Scale factor for each texture. */
float scale_factors[BRW_MAX_SAMPLERS];
};
struct brw_base_prog_key {

7
src/intel/compiler/brw_debug_recompile.c
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@@ -63,17 +63,10 @@ debug_sampler_recompile(const struct brw_compiler *c, void *log,
bool found = false;
found |= check("gather channel quirk", gather_channel_quirk_mask);
found |= check("y_uv image bound", y_uv_image_mask);
found |= check("y_u_v image bound", y_u_v_image_mask);
found |= check("yx_xuxv image bound", yx_xuxv_image_mask);
found |= check("xy_uxvx image bound", xy_uxvx_image_mask);
found |= check("ayuv image bound", ayuv_image_mask);
found |= check("xyuv image bound", xyuv_image_mask);
for (unsigned i = 0; i < BRW_MAX_SAMPLERS; i++) {
found |= check("EXT_texture_swizzle or DEPTH_TEXTURE_MODE", swizzles[i]);
found |= check("textureGather workarounds", gfx6_gather_wa[i]);
found |= check_float("scale factor", scale_factors[i]);
}
for (unsigned i = 0; i < 3; i++) {

13
src/intel/compiler/brw_nir.c
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@@ -1451,19 +1451,6 @@ brw_nir_apply_sampler_key(nir_shader *nir,
/* Prior to Haswell, we have to lower gradients on shadow samplers */
tex_options.lower_txd_shadow = devinfo->verx10 <= 70;
tex_options.lower_y_uv_external = key_tex->y_uv_image_mask;
tex_options.lower_y_u_v_external = key_tex->y_u_v_image_mask;
tex_options.lower_yx_xuxv_external = key_tex->yx_xuxv_image_mask;
tex_options.lower_xy_uxvx_external = key_tex->xy_uxvx_image_mask;
tex_options.lower_ayuv_external = key_tex->ayuv_image_mask;
tex_options.lower_xyuv_external = key_tex->xyuv_image_mask;
tex_options.bt709_external = key_tex->bt709_mask;
tex_options.bt2020_external = key_tex->bt2020_mask;
/* Setup array of scaling factors for each texture. */
memcpy(&tex_options.scale_factors, &key_tex->scale_factors,
sizeof(tex_options.scale_factors));
return nir_lower_tex(nir, &tex_options);
}