anv: fix alignments for uniform buffers
We were not consistent with minimums reported in the physical device
properties.
Fixes a few CTS tests :
dEQP-VK.memory.requirements.dedicated_allocation.buffer.regular
dEQP-VK.memory.requirements.extended.buffer.regular
dEQP-VK.memory.requirements.core.buffer.regular
v2: Use define for the limit
v3: Rename define
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a0de2e0090
("anv: increase minUniformBufferOffsetAlignment to 64")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4940>
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committed by
Marge Bot

parent
f105b69464
commit
8bcfce2fcd
@@ -1345,7 +1345,7 @@ anv_descriptor_set_write_buffer(struct anv_device *device,
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*/
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if (type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER ||
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type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC)
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bind_range = align_u64(bind_range, ANV_UBO_BOUNDS_CHECK_ALIGNMENT);
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bind_range = align_u64(bind_range, ANV_UBO_ALIGNMENT);
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if (type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC ||
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type == VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC) {
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@@ -1505,10 +1505,7 @@ void anv_GetPhysicalDeviceProperties(
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* case of R32G32B32A32 which is 16 bytes.
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*/
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.minTexelBufferOffsetAlignment = 16,
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/* We need 16 for UBO block reads to work and 32 for push UBOs.
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* However, we use 64 here to avoid cache issues.
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*/
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.minUniformBufferOffsetAlignment = 64,
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.minUniformBufferOffsetAlignment = ANV_UBO_ALIGNMENT,
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.minStorageBufferOffsetAlignment = 4,
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.minTexelOffset = -8,
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.maxTexelOffset = 7,
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@@ -1919,7 +1916,7 @@ void anv_GetPhysicalDeviceProperties2(
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properties->robustStorageBufferAccessSizeAlignment =
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ANV_SSBO_BOUNDS_CHECK_ALIGNMENT;
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properties->robustUniformBufferAccessSizeAlignment =
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ANV_UBO_BOUNDS_CHECK_ALIGNMENT;
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ANV_UBO_ALIGNMENT;
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break;
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}
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@@ -3850,9 +3847,8 @@ void anv_GetBufferMemoryRequirements(
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/* Base alignment requirement of a cache line */
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uint32_t alignment = 16;
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/* We need an alignment of 32 for pushing UBOs */
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if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT)
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alignment = MAX2(alignment, 32);
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alignment = MAX2(alignment, ANV_UBO_ALIGNMENT);
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pMemoryRequirements->size = buffer->size;
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pMemoryRequirements->alignment = alignment;
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@@ -173,7 +173,12 @@ struct gen_perf_config;
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#define MAX_PUSH_DESCRIPTORS 32 /* Minimum requirement */
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#define MAX_INLINE_UNIFORM_BLOCK_SIZE 4096
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#define MAX_INLINE_UNIFORM_BLOCK_DESCRIPTORS 32
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#define ANV_UBO_BOUNDS_CHECK_ALIGNMENT 32
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/* We need 16 for UBO block reads to work and 32 for push UBOs. However, we
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* use 64 here to avoid cache issues. This could most likely bring it back to
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* 32 if we had different virtual addresses for the different views on a given
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* GEM object.
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*/
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#define ANV_UBO_ALIGNMENT 64
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#define ANV_SSBO_BOUNDS_CHECK_ALIGNMENT 4
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#define MAX_VIEWS_FOR_PRIMITIVE_REPLICATION 16
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@@ -2664,7 +2664,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
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/* Align the range for consistency */
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if (desc->type == VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC)
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range = align_u32(range, ANV_UBO_BOUNDS_CHECK_ALIGNMENT);
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range = align_u32(range, ANV_UBO_ALIGNMENT);
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struct anv_address address =
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anv_address_add(desc->buffer->address, offset);
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@@ -2993,7 +2993,7 @@ get_push_range_bound_size(struct anv_cmd_buffer *cmd_buffer,
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uint32_t bound_range = MIN2(desc->range, desc->buffer->size - offset);
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/* Align the range for consistency */
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bound_range = align_u32(bound_range, ANV_UBO_BOUNDS_CHECK_ALIGNMENT);
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bound_range = align_u32(bound_range, ANV_UBO_ALIGNMENT);
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return bound_range;
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}
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