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iris: Fix memory alignment when importing dmabuf (GFX12.5)

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Fix the failure in modifier tests on MTL:

../src/intel/common/intel_aux_map.c:609: intel_aux_map_add_mapping:
Assertion `(address & get_page_mask(main_page_size)) == 0' failed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
This commit is contained in:
Jianxun Zhang
2023-06-12 20:30:02 +00:00
committed by Marge Bot
parent 94d827332f
commit 8bc7bcfa0c
3 changed files with 17 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
src/gallium/drivers/iris/iris_bufmgr.c
View File

@@ -1950,7 +1950,8 @@ iris_gem_set_tiling(struct iris_bo *bo, const struct isl_surf *surf)
}
struct iris_bo *
iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd)
iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd,
const uint64_t modifier)
{
uint32_t handle;
struct iris_bo *bo;
@@ -1999,17 +2000,16 @@ iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd)
bo->gem_handle = handle;
bo->real.prime_fd = needs_prime_fd(bufmgr) ? dup(prime_fd) : -1;
/* From the Bspec, Memory Compression - Gfx12:
*
* The base address for the surface has to be 64K page aligned and the
* surface is expected to be padded in the virtual domain to be 4 4K
* pages.
*
* The dmabuf may contain a compressed surface. Align the BO to 64KB just
* in case. We always align to 64KB even on platforms where we don't need
* to, because it's a fairly reasonable thing to do anyway.
uint64_t alignment = 1;
/* When an aux map will be used, there is an alignment requirement on the
* main surface from the mapping granularity. Some planes of the image may
* have smaller alignment requirements, but this one should work for all.
*/
bo->address = vma_alloc(bufmgr, IRIS_MEMZONE_OTHER, bo->size, 64 * 1024);
if (bufmgr->devinfo.has_aux_map && isl_drm_modifier_has_aux(modifier))
alignment = intel_aux_map_get_alignment(bufmgr->aux_map_ctx);
bo->address = vma_alloc(bufmgr, IRIS_MEMZONE_OTHER, bo->size, alignment);
if (bo->address == 0ull)
goto err_free;

3
src/gallium/drivers/iris/iris_bufmgr.h
View File

@@ -489,7 +489,8 @@ int iris_gem_get_tiling(struct iris_bo *bo, uint32_t *tiling);
int iris_gem_set_tiling(struct iris_bo *bo, const struct isl_surf *surf);
int iris_bo_export_dmabuf(struct iris_bo *bo, int *prime_fd);
struct iris_bo *iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd);
struct iris_bo *iris_bo_import_dmabuf(struct iris_bufmgr *bufmgr, int prime_fd,
const uint64_t modifier);
/**
* Exports a bo as a GEM handle into a given DRM file descriptor

6
src/gallium/drivers/iris/iris_resource.c
View File

@@ -358,7 +358,8 @@ iris_memobj_create_from_handle(struct pipe_screen *pscreen,
whandle->handle);
break;
case WINSYS_HANDLE_TYPE_FD:
bo = iris_bo_import_dmabuf(screen->bufmgr, whandle->handle);
bo = iris_bo_import_dmabuf(screen->bufmgr, whandle->handle,
whandle->modifier);
break;
default:
unreachable("invalid winsys handle type");
@@ -1421,7 +1422,8 @@ iris_resource_from_handle(struct pipe_screen *pscreen,
switch (whandle->type) {
case WINSYS_HANDLE_TYPE_FD:
res->bo = iris_bo_import_dmabuf(bufmgr, whandle->handle);
res->bo = iris_bo_import_dmabuf(bufmgr, whandle->handle,
whandle->modifier);
break;
case WINSYS_HANDLE_TYPE_SHARED:
res->bo = iris_bo_gem_create_from_name(bufmgr, "winsys image",