diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index e7fc9053729..1cfc23842ea 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -34,8 +34,6 @@
    .lower_scmp = true,                                                        \
    .lower_flrp16 = true,                                                      \
    .lower_fmod = true,                                                        \
-   .lower_bitfield_extract = true,                                            \
-   .lower_bitfield_insert = true,                                             \
    .lower_uadd_carry = true,                                                  \
    .lower_usub_borrow = true,                                                 \
    .lower_flrp64 = true,                                                      \
@@ -183,6 +181,11 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
       nir_options->lower_flrp32 = devinfo->ver < 6 || devinfo->ver >= 11;
       nir_options->lower_fpow = devinfo->ver >= 12;
 
+      nir_options->lower_bitfield_extract = devinfo->ver >= 7;
+      nir_options->lower_bitfield_extract_to_shifts = devinfo->ver < 7;
+      nir_options->lower_bitfield_insert = devinfo->ver >= 7;
+      nir_options->lower_bitfield_insert_to_shifts = devinfo->ver < 7;
+
       nir_options->lower_rotate = devinfo->ver < 11;
       nir_options->lower_bitfield_reverse = devinfo->ver < 7;
       nir_options->has_iadd3 = devinfo->verx10 >= 125;