anv: Port L3 cache programming from i965

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2016-04-02 01:34:40 -07:00
parent aa41de080d
commit 8a80af2820
9 changed files with 593 additions and 173 deletions
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -340,7 +340,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
    * but at least 3-D will.  In the mean time, I'm going to make this
    * gen8+ only so that we can get Haswell working again.
    */
-   genX(cmd_buffer_config_l3)(cmd_buffer, false);
+   genX(cmd_buffer_config_l3)(cmd_buffer, pipeline);
 #endif

   genX(flush_pipeline_select_3d)(cmd_buffer);