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anv/cmd_buffer: Use the new emit macro for quaries

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Acked-by: Kristian Høgsberg <krh@bitplanet.net>
This commit is contained in:
Jason Ekstrand
2016-04-18 15:20:06 -07:00
parent db25e1eec5
commit 8a6ced83e9
1 changed files with 31 additions and 23 deletions
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54
src/intel/vulkan/genX_cmd_buffer.c
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@@ -1192,20 +1192,23 @@ void genX(CmdWriteTimestamp)(
switch (pipelineStage) { switch (pipelineStage) {
case VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT: case VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT:
anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), anv_batch_emit_blk(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), srm) {
.RegisterAddress = TIMESTAMP, srm.RegisterAddress = TIMESTAMP;
.MemoryAddress = { &pool->bo, offset }); srm.MemoryAddress = (struct anv_address) { &pool->bo, offset };
anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), }
.RegisterAddress = TIMESTAMP + 4, anv_batch_emit_blk(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), srm) {
.MemoryAddress = { &pool->bo, offset + 4 }); srm.RegisterAddress = TIMESTAMP + 4;
srm.MemoryAddress = (struct anv_address) { &pool->bo, offset + 4 };
}
break; break;
default: default:
/* Everything else is bottom-of-pipe */ /* Everything else is bottom-of-pipe */
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), anv_batch_emit_blk(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
.DestinationAddressType = DAT_PPGTT, pc.DestinationAddressType = DAT_PPGTT,
.PostSyncOperation = WriteTimestamp, pc.PostSyncOperation = WriteTimestamp,
.Address = { &pool->bo, offset }); pc.Address = (struct anv_address) { &pool->bo, offset };
}
break; break;
} }
@@ -1250,26 +1253,31 @@ static void
emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg, emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg,
struct anv_bo *bo, uint32_t offset) struct anv_bo *bo, uint32_t offset)
{ {
anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), anv_batch_emit_blk(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) {
.RegisterAddress = reg, lrm.RegisterAddress = reg,
.MemoryAddress = { bo, offset }); lrm.MemoryAddress = (struct anv_address) { bo, offset };
anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), }
.RegisterAddress = reg + 4, anv_batch_emit_blk(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) {
.MemoryAddress = { bo, offset + 4 }); lrm.RegisterAddress = reg + 4;
lrm.MemoryAddress = (struct anv_address) { bo, offset + 4 };
}
} }
static void static void
store_query_result(struct anv_batch *batch, uint32_t reg, store_query_result(struct anv_batch *batch, uint32_t reg,
struct anv_bo *bo, uint32_t offset, VkQueryResultFlags flags) struct anv_bo *bo, uint32_t offset, VkQueryResultFlags flags)
{ {
anv_batch_emit(batch, GENX(MI_STORE_REGISTER_MEM), anv_batch_emit_blk(batch, GENX(MI_STORE_REGISTER_MEM), srm) {
.RegisterAddress = reg, srm.RegisterAddress = reg;
.MemoryAddress = { bo, offset }); srm.MemoryAddress = (struct anv_address) { bo, offset };
}
if (flags & VK_QUERY_RESULT_64_BIT) if (flags & VK_QUERY_RESULT_64_BIT) {
anv_batch_emit(batch, GENX(MI_STORE_REGISTER_MEM), anv_batch_emit_blk(batch, GENX(MI_STORE_REGISTER_MEM), srm) {
.RegisterAddress = reg + 4, srm.RegisterAddress = reg + 4;
.MemoryAddress = { bo, offset + 4 }); srm.MemoryAddress = (struct anv_address) { bo, offset + 4 };
}
}
} }
void genX(CmdCopyQueryPoolResults)( void genX(CmdCopyQueryPoolResults)(