nir/lower_tex: Add AYUV lowering support
Byte ordering is : 0: V 1: U 2: Y 3: A v2: Split refactoring of alpha channel (Lionel) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1) Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v2)
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@@ -2905,6 +2905,7 @@ typedef struct nir_lower_tex_options {
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unsigned lower_y_u_v_external;
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unsigned lower_yx_xuxv_external;
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unsigned lower_xy_uxvx_external;
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unsigned lower_ayuv_external;
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/**
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* To emulate certain texture wrap modes, this can be used
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