intel/compiler: Lower flrp32 on Gen11+
The LRP instruction is no more. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@@ -540,7 +540,7 @@ namespace brw {
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LRP(const dst_reg &dst, const src_reg &x, const src_reg &y,
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const src_reg &a) const
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{
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if (shader->devinfo->gen >= 6) {
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if (shader->devinfo->gen >= 6 && shader->devinfo->gen <= 10) {
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/* The LRP instruction actually does op1 * op0 + op2 * (1 - op0), so
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* we need to reorder the operands.
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*/
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