radv: disable EXT_vertex_input_dynamic_state when using DGC

This simplifies the DGC path and removes some untested code. The only user
of the partial DGC implementation (vkd3d-proton) doesn't use
EXT_vertex_input_dynamic_state.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>
This commit is contained in:
Rhys Perry
2022-09-07 15:55:56 +01:00
committed by Marge Bot
parent 04dc963cd6
commit 891cb799aa
2 changed files with 18 additions and 39 deletions

View File

@@ -386,6 +386,14 @@ radv_taskmesh_enabled(const struct radv_physical_device *pdevice)
pdevice->rad_info.has_scheduled_fence_dependency;
}
static bool
radv_NV_device_generated_commands_enabled(const struct radv_physical_device *device)
{
return device->rad_info.gfx_level >= GFX7 &&
!(device->instance->debug_flags & RADV_DEBUG_NO_IBS) &&
driQueryOptionb(&device->instance->dri_options, "radv_dgc");
}
#if defined(VK_USE_PLATFORM_WAYLAND_KHR) || defined(VK_USE_PLATFORM_XCB_KHR) || \
defined(VK_USE_PLATFORM_XLIB_KHR) || defined(VK_USE_PLATFORM_DISPLAY_KHR)
#define RADV_USE_WSI_PLATFORM
@@ -589,7 +597,8 @@ radv_physical_device_get_supported_extensions(const struct radv_physical_device
.EXT_texel_buffer_alignment = true,
.EXT_transform_feedback = device->rad_info.gfx_level < GFX11,
.EXT_vertex_attribute_divisor = true,
.EXT_vertex_input_dynamic_state = !device->use_llvm,
.EXT_vertex_input_dynamic_state = !device->use_llvm &&
!radv_NV_device_generated_commands_enabled(device),
.EXT_ycbcr_image_arrays = true,
.AMD_buffer_marker = true,
.AMD_device_coherent_memory = true,
@@ -617,9 +626,7 @@ radv_physical_device_get_supported_extensions(const struct radv_physical_device
.GOOGLE_user_type = true,
.INTEL_shader_integer_functions2 = true,
.NV_compute_shader_derivatives = true,
.NV_device_generated_commands = device->rad_info.gfx_level >= GFX7 &&
!(device->instance->debug_flags & RADV_DEBUG_NO_IBS) &&
driQueryOptionb(&device->instance->dri_options, "radv_dgc"),
.NV_device_generated_commands = radv_NV_device_generated_commands_enabled(device),
.NV_mesh_shader =
radv_taskmesh_enabled(device) && device->instance->perftest_flags & RADV_PERFTEST_NV_MS,
/* Undocumented extension purely for vkd3d-proton. This check is to prevent anyone else from

View File

@@ -147,7 +147,6 @@ struct radv_dgc_params {
/* bind index buffer info. Valid if base_index_size == 0 && draw_indexed */
uint16_t index_buffer_offset;
/* Top bit is DGC_DYNAMIC_VERTEX_INPUT */
uint8_t vbo_cnt;
uint8_t const_copy;
@@ -181,10 +180,6 @@ enum {
DGC_DYNAMIC_STRIDE = 1u << 15,
};
enum {
DGC_DYNAMIC_VERTEX_INPUT = 1u << 7,
};
enum {
DGC_DESC_STREAM,
DGC_DESC_PREPARE,
@@ -381,7 +376,7 @@ build_dgc_prepare_shader(struct radv_device *dev)
0x1);
nir_ssa_def *vbo_bind_mask = load_param32(&b, vbo_bind_mask);
nir_ssa_def *vbo_cnt = nir_iand_imm(&b, load_param8(&b, vbo_cnt), 0x7F);
nir_ssa_def *vbo_cnt = load_param8(&b, vbo_cnt);
nir_push_if(&b, nir_ine_imm(&b, vbo_bind_mask, 0));
{
nir_variable *vbo_idx =
@@ -425,9 +420,6 @@ build_dgc_prepare_shader(struct radv_device *dev)
nir_ssa_def *size = nir_channel(&b, stream_data, 2);
nir_ssa_def *stride = nir_channel(&b, stream_data, 3);
nir_ssa_def *vs_state_offset = nir_ubfe(&b, nir_channel(&b, vbo_over_data, 0), nir_imm_int(&b, 16), nir_imm_int(&b, 15));
va = nir_iadd(&b, va, nir_u2u64(&b, vs_state_offset));
nir_ssa_def *dyn_stride = nir_test_mask(&b, nir_channel(&b, vbo_over_data, 0), DGC_DYNAMIC_STRIDE);
nir_ssa_def *old_stride =
nir_ubfe(&b, nir_channel(&b, nir_load_var(&b, vbo_data), 1), nir_imm_int(&b, 16),
@@ -530,23 +522,9 @@ build_dgc_prepare_shader(struct radv_device *dev)
nir_push_if(&b,
nir_ior(&b, nir_ieq_imm(&b, num_records, 0), nir_ieq_imm(&b, buf_va, 0)));
{
nir_ssa_def *use_dynamic_vertex_input =
nir_test_mask(&b, load_param8(&b, vbo_cnt), DGC_DYNAMIC_VERTEX_INPUT);
nir_push_if(&b, use_dynamic_vertex_input);
{
nir_ssa_def *new_vbo_data[4] = {
nir_imm_int(&b, 0), nir_imm_int(&b, S_008F04_STRIDE(16)), nir_imm_int(&b, 0),
nir_channel(&b, nir_load_var(&b, vbo_data), 3)};
nir_store_var(&b, vbo_data, nir_vec(&b, new_vbo_data, 4), 0xf);
}
nir_push_else(&b, NULL);
{
nir_ssa_def *new_vbo_data[4] = {nir_imm_int(&b, 0), nir_imm_int(&b, 0),
nir_imm_int(&b, 0), nir_imm_int(&b, 0)};
nir_store_var(&b, vbo_data, nir_vec(&b, new_vbo_data, 4), 0xf);
}
nir_pop_if(&b, NULL);
nir_ssa_def *new_vbo_data[4] = {nir_imm_int(&b, 0), nir_imm_int(&b, 0),
nir_imm_int(&b, 0), nir_imm_int(&b, 0)};
nir_store_var(&b, vbo_data, nir_vec(&b, new_vbo_data, 4), 0xf);
}
nir_pop_if(&b, NULL);
@@ -1208,27 +1186,21 @@ radv_prepare_dgc(struct radv_cmd_buffer *cmd_buffer,
uint32_t *vbo_info = (uint32_t *)((char *)upload_data + graphics_pipeline->vb_desc_alloc_size);
struct radv_shader *vs_shader = radv_get_shader(&graphics_pipeline->base, MESA_SHADER_VERTEX);
const struct radv_vs_input_state *vs_state =
vs_shader->info.vs.dynamic_inputs ? &cmd_buffer->state.dynamic_vs_input : NULL;
uint32_t mask = graphics_pipeline->vb_desc_usage_mask;
unsigned idx = 0;
while (mask) {
unsigned i = u_bit_scan(&mask);
unsigned binding =
vs_state ? cmd_buffer->state.dynamic_vs_input.bindings[i]
: (graphics_pipeline->use_per_attribute_vb_descs ? graphics_pipeline->attrib_bindings[i] : i);
uint32_t attrib_end =
vs_state ? vs_state->offsets[i] + vs_state->format_sizes[i] : graphics_pipeline->attrib_ends[i];
graphics_pipeline->use_per_attribute_vb_descs ? graphics_pipeline->attrib_bindings[i] : i;
uint32_t attrib_end = graphics_pipeline->attrib_ends[i];
params.vbo_bind_mask |= ((layout->bind_vbo_mask >> binding) & 1u) << idx;
vbo_info[2 * idx] = ((graphics_pipeline->use_per_attribute_vb_descs ? 1u : 0u) << 31) |
(vs_state ? vs_state->offsets[i] << 16 : 0) |
layout->vbo_offsets[binding];
vbo_info[2 * idx + 1] = graphics_pipeline->attrib_index_offset[i] | (attrib_end << 16);
++idx;
}
params.vbo_cnt = idx | (vs_state ? DGC_DYNAMIC_VERTEX_INPUT : 0);
params.vbo_cnt = idx;
upload_data = (char *)upload_data + vb_size;
}