diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index b8d01a6d4da..c87c1216048 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -54,8 +54,7 @@ #define BRW_KEY_INIT(gen, prog_id, limit_trig_input) \ .base.program_string_id = prog_id, \ .base.limit_trig_input_range = limit_trig_input, \ - .base.tex.swizzles[0 ... BRW_MAX_SAMPLERS - 1] = 0x688, \ - .base.tex.msaa_16 = (gen >= 9 ? ~0 : 0) + .base.tex.swizzles[0 ... BRW_MAX_SAMPLERS - 1] = 0x688 struct iris_threaded_compile_job { struct iris_screen *screen; diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c index 7ab52736478..14ef27f849b 100644 --- a/src/intel/blorp/blorp_blit.c +++ b/src/intel/blorp/blorp_blit.c @@ -1527,7 +1527,6 @@ brw_blorp_get_blit_kernel_fs(struct blorp_batch *batch, struct brw_wm_prog_key wm_key; brw_blorp_init_wm_prog_key(&wm_key); - wm_key.base.tex.msaa_16 = blorp->isl_dev->info->ver >= 9; wm_key.multisample_fbo = key->rt_samples > 1; program = blorp_compile_fs(blorp, mem_ctx, nir, &wm_key, false, @@ -1567,7 +1566,6 @@ brw_blorp_get_blit_kernel_cs(struct blorp_batch *batch, struct brw_cs_prog_key cs_key; brw_blorp_init_cs_prog_key(&cs_key); - cs_key.base.tex.msaa_16 = blorp->isl_dev->info->ver >= 9; assert(prog_key->rt_samples == 1); program = blorp_compile_cs(blorp, mem_ctx, nir, &cs_key, &prog_data); diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index fedbe0c9203..61581216f60 100644 --- a/src/intel/blorp/blorp_clear.c +++ b/src/intel/blorp/blorp_clear.c @@ -1371,7 +1371,6 @@ blorp_params_get_mcs_partial_resolve_kernel(struct blorp_batch *batch, struct brw_wm_prog_key wm_key; brw_blorp_init_wm_prog_key(&wm_key); - wm_key.base.tex.msaa_16 = blorp->isl_dev->info->ver >= 9; wm_key.multisample_fbo = true; struct brw_wm_prog_data prog_data; diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index b26959de2f8..df62c1de05f 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -199,15 +199,6 @@ struct brw_sampler_prog_key_data { */ uint32_t gather_channel_quirk_mask; - uint32_t padding; - - /** - * Whether this sampler is using 16x multisampling. If so fetching from - * this sampler will be handled with a different instruction, ld2dms_w - * instead of ld2dms. - */ - uint32_t msaa_16; - /** * For Sandybridge, which shader w/a we need for gather quirks. */ diff --git a/src/intel/compiler/brw_debug_recompile.c b/src/intel/compiler/brw_debug_recompile.c index 304869b03af..705edde88b1 100644 --- a/src/intel/compiler/brw_debug_recompile.c +++ b/src/intel/compiler/brw_debug_recompile.c @@ -63,7 +63,6 @@ debug_sampler_recompile(const struct brw_compiler *c, void *log, bool found = false; found |= check("gather channel quirk", gather_channel_quirk_mask); - found |= check("16x msaa", msaa_16); found |= check("y_uv image bound", y_uv_image_mask); found |= check("y_u_v image bound", y_u_v_image_mask); found |= check("yx_xuxv image bound", yx_xuxv_image_mask); diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index cfc4d9989de..e52e2344076 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -6436,7 +6436,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) */ if (devinfo->verx10 >= 125) opcode = SHADER_OPCODE_TXF_CMS_W_GFX12_LOGICAL; - else if ((key_tex->msaa_16 & (1 << sampler))) + else if (devinfo->ver >= 9) opcode = SHADER_OPCODE_TXF_CMS_W_LOGICAL; else opcode = SHADER_OPCODE_TXF_CMS_LOGICAL; @@ -6468,7 +6468,7 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) */ if (srcs[TEX_LOGICAL_SRC_MCS].file == BRW_IMMEDIATE_VALUE) { bld.MOV(dst, brw_imm_ud(0u)); - } else if ((key_tex->msaa_16 & (1 << sampler))) { + } else if (devinfo->ver >= 9) { fs_reg tmp = vgrf(glsl_type::uint_type); bld.OR(tmp, srcs[TEX_LOGICAL_SRC_MCS], offset(srcs[TEX_LOGICAL_SRC_MCS], bld, 1)); diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 35a0e995354..ec154ac07e2 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -416,16 +416,6 @@ static void populate_sampler_prog_key(const struct intel_device_info *devinfo, struct brw_sampler_prog_key_data *key) { - /* SkyLake added support for 16x MSAA. With this came a new message for - * reading from a 16x MSAA surface with compression. The new message was - * needed because now the MCS data is 64 bits instead of 32 or lower as is - * the case for 8x, 4x, and 2x. The key->msaa_16 bit-field controls which - * message we use. Fortunately, the 16x message works for 8x, 4x, and 2x - * so we can just use it unconditionally. This may not be quite as - * efficient but it saves us from recompiling. - */ - key->msaa_16 = ~0; - for (int i = 0; i < BRW_MAX_SAMPLERS; i++) { /* Assume color sampler, no swizzling. (Works for BDW+) */ key->swizzles[i] = SWIZZLE_XYZW; diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c index d38d8f1bac8..66d8d77bb39 100644 --- a/src/intel/vulkan_hasvk/anv_pipeline.c +++ b/src/intel/vulkan_hasvk/anv_pipeline.c @@ -258,17 +258,6 @@ static void populate_sampler_prog_key(const struct intel_device_info *devinfo, struct brw_sampler_prog_key_data *key) { - /* SkyLake added support for 16x MSAA. With this came a new message for - * reading from a 16x MSAA surface with compression. The new message was - * needed because now the MCS data is 64 bits instead of 32 or lower as is - * the case for 8x, 4x, and 2x. The key->msaa_16 bit-field controls which - * message we use. Fortunately, the 16x message works for 8x, 4x, and 2x - * so we can just use it unconditionally. This may not be quite as - * efficient but it saves us from recompiling. - */ - if (devinfo->ver >= 9) - key->msaa_16 = ~0; - /* XXX: Handle texture swizzle on HSW- */ for (int i = 0; i < BRW_MAX_SAMPLERS; i++) { /* Assume color sampler, no swizzling. (Works for BDW+) */