radv: remove unnecessary RADV_DEBUG=nobatchchain option
It was used in the past but nowadays chained submissions work fine. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3791>
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@@ -628,8 +628,6 @@ Mesa EGL supports different sets of environment variables. See the
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<dd>enable wave32 for vertex/tess/geometry shaders (GFX10+)</dd>
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<dt><code>localbos</code></dt>
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<dd>enable local BOs</dd>
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<dt><code>nobatchchain</code></dt>
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<dd>disable chained submissions</dd>
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<dt><code>pswave32</code></dt>
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<dd>enable wave32 for pixel shaders (GFX10+)</dd>
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<dt><code>shader_ballot</code></dt>
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@@ -60,17 +60,16 @@ enum {
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};
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enum {
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RADV_PERFTEST_NO_BATCHCHAIN = 0x1,
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RADV_PERFTEST_LOCAL_BOS = 0x2,
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RADV_PERFTEST_DCC_MSAA = 0x4,
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RADV_PERFTEST_BO_LIST = 0x8,
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RADV_PERFTEST_SHADER_BALLOT = 0x10,
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RADV_PERFTEST_TC_COMPAT_CMASK = 0x20,
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RADV_PERFTEST_CS_WAVE_32 = 0x40,
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RADV_PERFTEST_PS_WAVE_32 = 0x80,
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RADV_PERFTEST_GE_WAVE_32 = 0x100,
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RADV_PERFTEST_DFSM = 0x200,
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RADV_PERFTEST_ACO = 0x400,
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RADV_PERFTEST_LOCAL_BOS = 0x1,
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RADV_PERFTEST_DCC_MSAA = 0x2,
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RADV_PERFTEST_BO_LIST = 0x4,
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RADV_PERFTEST_SHADER_BALLOT = 0x8,
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RADV_PERFTEST_TC_COMPAT_CMASK = 0x10,
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RADV_PERFTEST_CS_WAVE_32 = 0x20,
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RADV_PERFTEST_PS_WAVE_32 = 0x40,
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RADV_PERFTEST_GE_WAVE_32 = 0x80,
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RADV_PERFTEST_DFSM = 0x100,
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RADV_PERFTEST_ACO = 0x200,
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};
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bool
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@@ -572,7 +572,6 @@ radv_get_debug_option_name(int id)
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}
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static const struct debug_control radv_perftest_options[] = {
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{"nobatchchain", RADV_PERFTEST_NO_BATCHCHAIN},
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{"localbos", RADV_PERFTEST_LOCAL_BOS},
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{"dccmsaa", RADV_PERFTEST_DCC_MSAA},
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{"bolist", RADV_PERFTEST_BO_LIST},
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@@ -1242,7 +1242,7 @@ static int radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx,
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if (!cs->ws->use_ib_bos) {
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ret = radv_amdgpu_winsys_cs_submit_sysmem(_ctx, queue_idx, sem_info, bo_list, cs_array,
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cs_count, initial_preamble_cs, continue_preamble_cs, _fence);
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} else if (can_patch && cs->ws->batchchain) {
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} else if (can_patch) {
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ret = radv_amdgpu_winsys_cs_submit_chained(_ctx, queue_idx, sem_info, bo_list, cs_array,
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cs_count, initial_preamble_cs, continue_preamble_cs, _fence);
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} else {
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@@ -190,7 +190,6 @@ radv_amdgpu_winsys_create(int fd, uint64_t debug_flags, uint64_t perftest_flags)
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ws->use_local_bos = perftest_flags & RADV_PERFTEST_LOCAL_BOS;
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ws->zero_all_vram_allocs = debug_flags & RADV_DEBUG_ZERO_VRAM;
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ws->noop = debug_flags & RADV_DEBUG_NOOP;
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ws->batchchain = !(perftest_flags & RADV_PERFTEST_NO_BATCHCHAIN);
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list_inithead(&ws->global_bo_list);
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pthread_mutex_init(&ws->global_bo_list_lock, NULL);
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ws->base.query_info = radv_amdgpu_winsys_query_info;
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@@ -44,7 +44,6 @@ struct radv_amdgpu_winsys {
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ADDR_HANDLE addrlib;
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bool debug_all_bos;
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bool batchchain;
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bool use_ib_bos;
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bool zero_all_vram_allocs;
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bool use_local_bos;
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