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nak/qmd: Return the complete QMD dispatch size layout

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Instead of returning a single offset, return a struct with three ranges,
one for X, Y, and Z.  This also communicates the sizes of each of the
fields to the driver in case that's relevant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25167>
This commit is contained in:
Faith Ekstrand
2024-07-29 10:22:35 -05:00
committed by Marge Bot
parent 217c0a489b
commit 884c7bccc1
3 changed files with 33 additions and 16 deletions
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9
src/nouveau/compiler/nak.h
View File

@@ -205,7 +205,14 @@ void nak_fill_qmd(const struct nv_device_info *dev,
const struct nak_qmd_info *qmd_info,
void *qmd_out, size_t qmd_size);
uint32_t nak_qmd_dispatch_size_offset(const struct nv_device_info *dev);
struct nak_qmd_dispatch_size_layout {
uint16_t x_start, x_end;
uint16_t y_start, y_end;
uint16_t z_start, z_end;
};
struct nak_qmd_dispatch_size_layout
nak_get_qmd_dispatch_size_layout(const struct nv_device_info *dev);
#ifdef __cplusplus
}

33
src/nouveau/compiler/nak/qmd.rs
View File

@@ -12,7 +12,7 @@ use paste::paste;
type QMDBitView<'a> = BitMutView<'a, [u32]>;
trait QMD {
const GLOBAL_SIZE_OFFSET: usize;
const GLOBAL_SIZE_LAYOUT: nak_qmd_dispatch_size_layout;
fn new() -> Self;
fn set_barrier_count(&mut self, barrier_count: u8);
@@ -64,10 +64,18 @@ macro_rules! qmd_impl_common {
set_field!(bv, $c, $s, BARRIER_COUNT, barrier_count);
}
const GLOBAL_SIZE_OFFSET: usize = {
const GLOBAL_SIZE_LAYOUT: nak_qmd_dispatch_size_layout = {
let w = paste! {$c::[<$s _CTA_RASTER_WIDTH>]};
assert!(w.end == w.start + 32);
w.start / 8
let h = paste! {$c::[<$s _CTA_RASTER_HEIGHT>]};
let d = paste! {$c::[<$s _CTA_RASTER_DEPTH>]};
nak_qmd_dispatch_size_layout {
x_start: w.start as u16,
x_end: w.end as u16,
y_start: h.start as u16,
y_end: h.end as u16,
z_start: d.start as u16,
z_end: d.end as u16,
}
};
fn set_global_size(&mut self, width: u32, height: u32, depth: u32) {
@@ -412,20 +420,17 @@ pub extern "C" fn nak_fill_qmd(
}
#[no_mangle]
pub extern "C" fn nak_qmd_dispatch_size_offset(
dev: *const nv_device_info,
) -> u32 {
assert!(!dev.is_null());
let dev = unsafe { &*dev };
pub extern "C" fn nak_get_qmd_dispatch_size_layout(
dev: &nv_device_info,
) -> nak_qmd_dispatch_size_layout {
if dev.cls_compute >= clc6c0::AMPERE_COMPUTE_A {
Qmd3_0::GLOBAL_SIZE_OFFSET.try_into().unwrap()
Qmd3_0::GLOBAL_SIZE_LAYOUT.try_into().unwrap()
} else if dev.cls_compute >= clc3c0::VOLTA_COMPUTE_A {
Qmd2_2::GLOBAL_SIZE_OFFSET.try_into().unwrap()
Qmd2_2::GLOBAL_SIZE_LAYOUT.try_into().unwrap()
} else if dev.cls_compute >= clc0c0::PASCAL_COMPUTE_A {
Qmd2_1::GLOBAL_SIZE_OFFSET.try_into().unwrap()
Qmd2_1::GLOBAL_SIZE_LAYOUT.try_into().unwrap()
} else if dev.cls_compute >= cla0c0::KEPLER_COMPUTE_A {
Qmd0_6::GLOBAL_SIZE_OFFSET.try_into().unwrap()
Qmd0_6::GLOBAL_SIZE_LAYOUT.try_into().unwrap()
} else {
panic!("Unsupported shader model");
}

7
src/nouveau/vulkan/nvk_cmd_dispatch.c
View File

@@ -310,7 +310,12 @@ nvk_mme_dispatch_indirect(struct mme_builder *b)
mme_tu104_read_fifoed(b, dispatch_addr, mme_imm(3));
uint32_t qmd_size_offset = nak_qmd_dispatch_size_offset(b->devinfo);
struct nak_qmd_dispatch_size_layout qmd_size_layout =
nak_get_qmd_dispatch_size_layout(b->devinfo);
assert(qmd_size_layout.y_start == qmd_size_layout.x_start + 32);
assert(qmd_size_layout.z_start == qmd_size_layout.x_start + 64);
uint32_t qmd_size_offset = qmd_size_layout.x_start / 32;
uint32_t root_desc_size_offset =
offsetof(struct nvk_root_descriptor_table, cs.group_count);