etnaviv: rs: treat depth-only clear to X8Z24 surfaces as full clear

X8Z24 surfaces have a don't care stencil channel, which is okay to be
cleared together with the depth channel. Set the depth clear bits
accordingly to allow those clears to use the fast-clear path when
only depth is to be cleared. This change aligns the RS with the BLT
ZS clear path.

Fixes: df63f188e8 ("etnaviv: fix separate depth/stencil clears")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28696>
This commit is contained in:
Lucas Stach
2024-04-12 15:48:56 +02:00
committed by Marge Bot
parent fc0d65e54f
commit 87bfad9efa

View File

@@ -380,10 +380,10 @@ etna_blit_clear_zs_rs(struct pipe_context *pctx, struct pipe_surface *dst,
/* Get the channels to clear */
switch (surf->base.format) {
case PIPE_FORMAT_Z16_UNORM:
case PIPE_FORMAT_X8Z24_UNORM:
clear_bits_depth = 0xffff;
clear_bits_stencil = 0;
break;
case PIPE_FORMAT_X8Z24_UNORM:
case PIPE_FORMAT_S8_UINT_Z24_UNORM:
clear_bits_depth = 0xeeee;
clear_bits_stencil = 0x1111;