radv: replace blend_enable_4bit by radv_pipeline_is_blend_enabled()
Same logic, though this workaround shouldn't be determined from the pipeline. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517>
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@@ -51,8 +51,6 @@
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#include "vk_format.h"
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#include "vk_format.h"
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struct radv_blend_state {
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struct radv_blend_state {
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uint32_t blend_enable_4bit;
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uint32_t spi_shader_col_format;
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uint32_t spi_shader_col_format;
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uint32_t cb_shader_mask;
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uint32_t cb_shader_mask;
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};
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};
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@@ -689,8 +687,6 @@ radv_pipeline_init_blend_state(struct radv_graphics_pipeline *pipeline,
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blend_cntl |= S_028780_ALPHA_DESTBLEND(si_translate_blend_factor(gfx_level, dstA));
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blend_cntl |= S_028780_ALPHA_DESTBLEND(si_translate_blend_factor(gfx_level, dstA));
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}
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}
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pipeline->cb_blend_control[i] = blend_cntl;
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pipeline->cb_blend_control[i] = blend_cntl;
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blend.blend_enable_4bit |= 0xfu << (i * 4);
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}
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}
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}
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}
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@@ -1547,8 +1543,7 @@ radv_pipeline_uses_ds_feedback_loop(const VkGraphicsPipelineCreateInfo *pCreateI
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static uint32_t
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static uint32_t
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radv_compute_db_shader_control(const struct radv_graphics_pipeline *pipeline,
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radv_compute_db_shader_control(const struct radv_graphics_pipeline *pipeline,
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const struct vk_graphics_pipeline_state *state,
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const struct vk_graphics_pipeline_state *state,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const VkGraphicsPipelineCreateInfo *pCreateInfo)
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const struct radv_blend_state *blend)
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{
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{
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const struct radv_physical_device *pdevice = pipeline->base.device->physical_device;
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const struct radv_physical_device *pdevice = pipeline->base.device->physical_device;
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bool uses_ds_feedback_loop = radv_pipeline_uses_ds_feedback_loop(pCreateInfo, state);
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bool uses_ds_feedback_loop = radv_pipeline_uses_ds_feedback_loop(pCreateInfo, state);
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@@ -1579,7 +1574,7 @@ radv_compute_db_shader_control(const struct radv_graphics_pipeline *pipeline,
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bool export_conflict_wa =
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bool export_conflict_wa =
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pipeline->base.device->physical_device->rad_info.has_export_conflict_bug &&
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pipeline->base.device->physical_device->rad_info.has_export_conflict_bug &&
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blend->blend_enable_4bit &&
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radv_pipeline_is_blend_enabled(pipeline, state->cb) &&
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(!state->ms || state->ms->rasterization_samples <= 1 ||
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(!state->ms || state->ms->rasterization_samples <= 1 ||
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(pipeline->dynamic_states & RADV_DYNAMIC_RASTERIZATION_SAMPLES));
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(pipeline->dynamic_states & RADV_DYNAMIC_RASTERIZATION_SAMPLES));
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@@ -1600,12 +1595,11 @@ radv_compute_db_shader_control(const struct radv_graphics_pipeline *pipeline,
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static struct radv_depth_stencil_state
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static struct radv_depth_stencil_state
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radv_pipeline_init_depth_stencil_state(struct radv_graphics_pipeline *pipeline,
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radv_pipeline_init_depth_stencil_state(struct radv_graphics_pipeline *pipeline,
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const struct vk_graphics_pipeline_state *state,
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const struct vk_graphics_pipeline_state *state,
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const VkGraphicsPipelineCreateInfo *pCreateInfo,
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const VkGraphicsPipelineCreateInfo *pCreateInfo)
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const struct radv_blend_state *blend)
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{
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{
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struct radv_depth_stencil_state ds_state = {0};
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struct radv_depth_stencil_state ds_state = {0};
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ds_state.db_shader_control = radv_compute_db_shader_control(pipeline, state, pCreateInfo, blend);
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ds_state.db_shader_control = radv_compute_db_shader_control(pipeline, state, pCreateInfo);
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return ds_state;
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return ds_state;
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}
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}
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@@ -5239,7 +5233,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv
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radv_pipeline_init_dynamic_state(pipeline, &state);
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radv_pipeline_init_dynamic_state(pipeline, &state);
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struct radv_depth_stencil_state ds_state =
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struct radv_depth_stencil_state ds_state =
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radv_pipeline_init_depth_stencil_state(pipeline, &state, pCreateInfo, &blend);
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radv_pipeline_init_depth_stencil_state(pipeline, &state, pCreateInfo);
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if (device->physical_device->rad_info.gfx_level >= GFX10_3)
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if (device->physical_device->rad_info.gfx_level >= GFX10_3)
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gfx103_pipeline_init_vrs_state(pipeline, &state);
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gfx103_pipeline_init_vrs_state(pipeline, &state);
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