i965: store DRM fd on intel_screen

v2: Fix storing of drm fd (Ajax)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
This commit is contained in:
Lionel Landwerlin
2020-03-06 16:56:25 +02:00
parent 0a497eb130
commit 865b840a6b
5 changed files with 16 additions and 19 deletions

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@@ -484,7 +484,7 @@ brw_init_perf_query_info(struct gl_context *ctx)
if (perf_cfg) if (perf_cfg)
return perf_cfg->n_queries; return perf_cfg->n_queries;
if (!oa_metrics_kernel_support(brw->screen->driScrnPriv->fd, devinfo)) if (!oa_metrics_kernel_support(brw->screen->fd, devinfo))
return 0; return 0;
perf_cfg = gen_perf_new(ctx); perf_cfg = gen_perf_new(ctx);
@@ -505,8 +505,8 @@ brw_init_perf_query_info(struct gl_context *ctx)
perf_cfg->vtbl.bo_busy = (bo_busy_t)brw_bo_busy; perf_cfg->vtbl.bo_busy = (bo_busy_t)brw_bo_busy;
gen_perf_init_context(perf_ctx, perf_cfg, brw, brw->bufmgr, devinfo, gen_perf_init_context(perf_ctx, perf_cfg, brw, brw->bufmgr, devinfo,
brw->hw_ctx, brw->screen->driScrnPriv->fd); brw->hw_ctx, brw->screen->fd);
gen_perf_init_metrics(perf_cfg, devinfo, brw->screen->driScrnPriv->fd); gen_perf_init_metrics(perf_cfg, devinfo, brw->screen->fd);
return perf_cfg->n_queries; return perf_cfg->n_queries;
} }

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@@ -35,7 +35,6 @@ GLenum
brw_get_graphics_reset_status(struct gl_context *ctx) brw_get_graphics_reset_status(struct gl_context *ctx)
{ {
struct brw_context *brw = brw_context(ctx); struct brw_context *brw = brw_context(ctx);
__DRIscreen *dri_screen = brw->screen->driScrnPriv;
struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx }; struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx };
/* If hardware contexts are not being used (or /* If hardware contexts are not being used (or
@@ -51,7 +50,7 @@ brw_get_graphics_reset_status(struct gl_context *ctx)
if (brw->reset_count != 0) if (brw->reset_count != 0)
return GL_NO_ERROR; return GL_NO_ERROR;
if (drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0) if (drmIoctl(brw->screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0)
return GL_NO_ERROR; return GL_NO_ERROR;
/* A reset was observed while a batch from this context was executing. /* A reset was observed while a batch from this context was executing.
@@ -77,10 +76,9 @@ brw_get_graphics_reset_status(struct gl_context *ctx)
void void
brw_check_for_reset(struct brw_context *brw) brw_check_for_reset(struct brw_context *brw)
{ {
__DRIscreen *dri_screen = brw->screen->driScrnPriv;
struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx }; struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx };
if (drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0) if (drmIoctl(brw->screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0)
return; return;
if (stats.batch_active > 0 || stats.batch_pending > 0) if (stats.batch_active > 0 || stats.batch_pending > 0)

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@@ -675,8 +675,7 @@ throttle(struct brw_context *brw)
} }
if (brw->need_flush_throttle) { if (brw->need_flush_throttle) {
__DRIscreen *dri_screen = brw->screen->driScrnPriv; drmCommandNone(brw->screen->fd, DRM_I915_GEM_THROTTLE);
drmCommandNone(dri_screen->fd, DRM_I915_GEM_THROTTLE);
brw->need_flush_throttle = false; brw->need_flush_throttle = false;
} }
} }
@@ -741,7 +740,6 @@ execbuffer(int fd,
static int static int
submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd) submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
{ {
__DRIscreen *dri_screen = brw->screen->driScrnPriv;
struct intel_batchbuffer *batch = &brw->batch; struct intel_batchbuffer *batch = &brw->batch;
int ret = 0; int ret = 0;
@@ -808,7 +806,7 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
batch->exec_bos[index] = tmp_bo; batch->exec_bos[index] = tmp_bo;
} }
ret = execbuffer(dri_screen->fd, batch, brw->hw_ctx, ret = execbuffer(brw->screen->fd, batch, brw->hw_ctx,
4 * USED_BATCH(*batch), 4 * USED_BATCH(*batch),
in_fence_fd, out_fence_fd, flags); in_fence_fd, out_fence_fd, flags);

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@@ -1675,7 +1675,7 @@ intel_get_param(struct intel_screen *screen, int param, int *value)
gp.param = param; gp.param = param;
gp.value = value; gp.value = value;
if (drmIoctl(screen->driScrnPriv->fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) { if (drmIoctl(screen->fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) {
ret = -errno; ret = -errno;
if (ret != -EINVAL) if (ret != -EINVAL)
_mesa_warning(NULL, "drm_i915_getparam: %d", ret); _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
@@ -1910,8 +1910,6 @@ err_out:
static bool static bool
intel_init_bufmgr(struct intel_screen *screen) intel_init_bufmgr(struct intel_screen *screen)
{ {
__DRIscreen *dri_screen = screen->driScrnPriv;
if (getenv("INTEL_NO_HW") != NULL) if (getenv("INTEL_NO_HW") != NULL)
screen->no_hw = true; screen->no_hw = true;
@@ -1925,7 +1923,7 @@ intel_init_bufmgr(struct intel_screen *screen)
break; break;
} }
screen->bufmgr = brw_bufmgr_init(&screen->devinfo, dri_screen->fd, bo_reuse); screen->bufmgr = brw_bufmgr_init(&screen->devinfo, screen->fd, bo_reuse);
if (screen->bufmgr == NULL) { if (screen->bufmgr == NULL) {
fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
__func__, __LINE__); __func__, __LINE__);
@@ -2097,8 +2095,7 @@ intel_detect_pipelined_register(struct intel_screen *screen,
/* Don't bother with error checking - if the execbuf fails, the /* Don't bother with error checking - if the execbuf fails, the
* value won't be written and we'll just report that there's no access. * value won't be written and we'll just report that there's no access.
*/ */
__DRIscreen *dri_screen = screen->driScrnPriv; drmIoctl(screen->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
/* Check whether the value got written. */ /* Check whether the value got written. */
void *results_map = brw_bo_map(NULL, results, MAP_READ); void *results_map = brw_bo_map(NULL, results, MAP_READ);
@@ -2564,6 +2561,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
return NULL; return NULL;
} }
screen->fd = dri_screen->fd;
if (!intel_init_bufmgr(screen)) if (!intel_init_bufmgr(screen))
return NULL; return NULL;
@@ -2609,7 +2607,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
screen->max_gtt_map_object_size = gtt_size / 4; screen->max_gtt_map_object_size = gtt_size / 4;
} }
screen->aperture_threshold = get_aperture_size(dri_screen->fd) * 3 / 4; screen->aperture_threshold = get_aperture_size(screen->fd) * 3 / 4;
screen->hw_has_swizzling = intel_detect_swizzling(screen); screen->hw_has_swizzling = intel_detect_swizzling(screen);
screen->hw_has_timestamp = intel_detect_timestamp(screen); screen->hw_has_timestamp = intel_detect_timestamp(screen);
@@ -2798,7 +2796,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
struct drm_i915_reset_stats stats; struct drm_i915_reset_stats stats;
memset(&stats, 0, sizeof(stats)); memset(&stats, 0, sizeof(stats));
const int ret = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats); const int ret = drmIoctl(screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
screen->has_context_reset_notification = screen->has_context_reset_notification =
(ret != -1 || errno != EINVAL); (ret != -1 || errno != EINVAL);

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@@ -56,6 +56,9 @@ struct intel_screen
/** Bytes of aperture usage beyond which execbuf is likely to fail. */ /** Bytes of aperture usage beyond which execbuf is likely to fail. */
uint64_t aperture_threshold; uint64_t aperture_threshold;
/** DRM fd associated with this screen. Not owned by this object. Do not close. */
int fd;
bool no_hw; bool no_hw;
bool hw_has_swizzling; bool hw_has_swizzling;
bool has_exec_fence; /**< I915_PARAM_HAS_EXEC_FENCE */ bool has_exec_fence; /**< I915_PARAM_HAS_EXEC_FENCE */