diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 821e2c95b26..187b9599358 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -2882,14 +2882,14 @@ uint64_t ac_surface_get_plane_offset(enum chip_class chip_class, uint64_t ac_surface_get_plane_stride(enum chip_class chip_class, const struct radeon_surf *surf, - unsigned plane) + unsigned plane, unsigned level) { switch (plane) { case 0: if (chip_class >= GFX9) { - return surf->u.gfx9.surf_pitch * surf->bpe; + return (surf->is_linear ? surf->u.gfx9.pitch[level] : surf->u.gfx9.surf_pitch) * surf->bpe; } else { - return surf->u.legacy.level[0].nblk_x * surf->bpe; + return surf->u.legacy.level[level].nblk_x * surf->bpe; } case 1: return 1 + (surf->display_dcc_offset ? diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index e91826404ba..4e5f4fa67ed 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -465,7 +465,7 @@ uint64_t ac_surface_get_plane_offset(enum chip_class chip_class, unsigned plane, unsigned layer); uint64_t ac_surface_get_plane_stride(enum chip_class chip_class, const struct radeon_surf *surf, - unsigned plane); + unsigned plane, unsigned level); /* Of the whole miplevel, not an individual layer */ uint64_t ac_surface_get_plane_size(const struct radeon_surf *surf, unsigned plane); diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index d74dc6a7bf3..cfbf272f660 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -2363,7 +2363,7 @@ radv_GetImageSubresourceLayout(VkDevice _device, VkImage _image, pLayout->offset = ac_surface_get_plane_offset(device->physical_device->rad_info.chip_class, surface, mem_plane_id, 0); pLayout->rowPitch = ac_surface_get_plane_stride(device->physical_device->rad_info.chip_class, - surface, mem_plane_id); + surface, mem_plane_id, level); pLayout->arrayPitch = 0; pLayout->depthPitch = 0; pLayout->size = ac_surface_get_plane_size(surface, mem_plane_id); diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 9a21fbde988..65c7f99fd9a 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -593,15 +593,17 @@ static bool si_resource_get_param(struct pipe_screen *screen, struct pipe_contex *value = 0; else *value = ac_surface_get_plane_stride(sscreen->info.chip_class, - &tex->surface, plane); + &tex->surface, plane, level); return true; case PIPE_RESOURCE_PARAM_OFFSET: - if (resource->target == PIPE_BUFFER) + if (resource->target == PIPE_BUFFER) { *value = 0; - else + } else { + uint64_t level_offset = tex->surface.is_linear ? tex->surface.u.gfx9.offset[level] : 0; *value = ac_surface_get_plane_offset(sscreen->info.chip_class, - &tex->surface, plane, layer); + &tex->surface, plane, layer) + level_offset; + } return true; case PIPE_RESOURCE_PARAM_MODIFIER: @@ -685,7 +687,7 @@ static bool si_texture_get_handle(struct pipe_screen *screen, struct pipe_contex whandle->offset = ac_surface_get_plane_offset(sscreen->info.chip_class, &tex->surface, plane, 0); whandle->stride = ac_surface_get_plane_stride(sscreen->info.chip_class, - &tex->surface, plane); + &tex->surface, plane, 0); whandle->modifier = tex->surface.modifier; return sscreen->ws->buffer_get_handle(sscreen->ws, res->buf, whandle); } @@ -1586,7 +1588,7 @@ static struct pipe_resource *si_texture_from_winsys_buffer(struct si_screen *ssc ptex->offset != ac_surface_get_plane_offset(sscreen->info.chip_class, &tex->surface, plane, 0) || ptex->stride != ac_surface_get_plane_stride(sscreen->info.chip_class, - &tex->surface, plane)) { + &tex->surface, plane, 0)) { si_texture_reference(&tex, NULL); return NULL; }