anv: Allocate misc BOs from the cache
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
@@ -1586,7 +1586,7 @@ setup_execbuf_for_cmd_buffer(struct anv_execbuf *execbuf,
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static VkResult
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static VkResult
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setup_empty_execbuf(struct anv_execbuf *execbuf, struct anv_device *device)
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setup_empty_execbuf(struct anv_execbuf *execbuf, struct anv_device *device)
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{
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{
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VkResult result = anv_execbuf_add_bo(execbuf, &device->trivial_batch_bo,
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VkResult result = anv_execbuf_add_bo(execbuf, device->trivial_batch_bo,
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NULL, 0, &device->alloc);
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NULL, 0, &device->alloc);
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if (result != VK_SUCCESS)
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if (result != VK_SUCCESS)
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return result;
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return result;
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@@ -245,7 +245,7 @@ get_blorp_surf_for_anv_image(const struct anv_device *device,
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* buffer. We have a single global buffer that stores the 1.0 value.
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* buffer. We have a single global buffer that stores the 1.0 value.
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*/
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*/
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const struct anv_address clear_color_addr = (struct anv_address) {
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const struct anv_address clear_color_addr = (struct anv_address) {
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.bo = (struct anv_bo *)&device->hiz_clear_bo
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.bo = device->hiz_clear_bo,
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};
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};
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blorp_surf->clear_color_addr = anv_to_blorp_address(clear_color_addr);
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blorp_surf->clear_color_addr = anv_to_blorp_address(clear_color_addr);
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}
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}
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@@ -2191,35 +2191,28 @@ anv_device_init_border_colors(struct anv_device *device)
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}
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}
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}
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}
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static void
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static VkResult
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anv_device_init_trivial_batch(struct anv_device *device)
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anv_device_init_trivial_batch(struct anv_device *device)
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{
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{
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anv_bo_init_new(&device->trivial_batch_bo, device, 4096);
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VkResult result = anv_device_alloc_bo(device, 4096,
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ANV_BO_ALLOC_MAPPED,
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if (device->instance->physicalDevice.has_exec_async)
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&device->trivial_batch_bo);
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device->trivial_batch_bo.flags |= EXEC_OBJECT_ASYNC;
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if (result != VK_SUCCESS)
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return result;
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if (device->instance->physicalDevice.use_softpin)
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device->trivial_batch_bo.flags |= EXEC_OBJECT_PINNED;
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anv_vma_alloc(device, &device->trivial_batch_bo);
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void *map = anv_gem_mmap(device, device->trivial_batch_bo.gem_handle,
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0, 4096, 0);
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struct anv_batch batch = {
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struct anv_batch batch = {
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.start = map,
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.start = device->trivial_batch_bo->map,
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.next = map,
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.next = device->trivial_batch_bo->map,
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.end = map + 4096,
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.end = device->trivial_batch_bo->map + 4096,
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};
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};
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anv_batch_emit(&batch, GEN7_MI_BATCH_BUFFER_END, bbe);
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anv_batch_emit(&batch, GEN7_MI_BATCH_BUFFER_END, bbe);
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anv_batch_emit(&batch, GEN7_MI_NOOP, noop);
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anv_batch_emit(&batch, GEN7_MI_NOOP, noop);
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if (!device->info.has_llc)
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if (!device->info.has_llc)
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gen_clflush_range(map, batch.next - map);
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gen_clflush_range(batch.start, batch.next - batch.start);
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anv_gem_munmap(map, device->trivial_batch_bo.size);
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return VK_SUCCESS;
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}
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}
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VkResult anv_EnumerateDeviceExtensionProperties(
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VkResult anv_EnumerateDeviceExtensionProperties(
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@@ -2306,27 +2299,24 @@ vk_priority_to_gen(int priority)
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}
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}
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}
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}
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static void
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static VkResult
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anv_device_init_hiz_clear_value_bo(struct anv_device *device)
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anv_device_init_hiz_clear_value_bo(struct anv_device *device)
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{
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{
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anv_bo_init_new(&device->hiz_clear_bo, device, 4096);
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VkResult result = anv_device_alloc_bo(device, 4096,
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ANV_BO_ALLOC_MAPPED,
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if (device->instance->physicalDevice.has_exec_async)
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&device->hiz_clear_bo);
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device->hiz_clear_bo.flags |= EXEC_OBJECT_ASYNC;
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if (result != VK_SUCCESS)
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return result;
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if (device->instance->physicalDevice.use_softpin)
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device->hiz_clear_bo.flags |= EXEC_OBJECT_PINNED;
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anv_vma_alloc(device, &device->hiz_clear_bo);
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uint32_t *map = anv_gem_mmap(device, device->hiz_clear_bo.gem_handle,
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0, 4096, 0);
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union isl_color_value hiz_clear = { .u32 = { 0, } };
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union isl_color_value hiz_clear = { .u32 = { 0, } };
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hiz_clear.f32[0] = ANV_HZ_FC_VAL;
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hiz_clear.f32[0] = ANV_HZ_FC_VAL;
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memcpy(map, hiz_clear.u32, sizeof(hiz_clear.u32));
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memcpy(device->hiz_clear_bo->map, hiz_clear.u32, sizeof(hiz_clear.u32));
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anv_gem_munmap(map, device->hiz_clear_bo.size);
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if (!device->info.has_llc)
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gen_clflush_range(device->hiz_clear_bo->map, sizeof(hiz_clear.u32));
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return VK_SUCCESS;
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}
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}
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static bool
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static bool
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@@ -2647,20 +2637,19 @@ VkResult anv_CreateDevice(
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goto fail_binding_table_pool;
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goto fail_binding_table_pool;
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}
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}
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result = anv_bo_init_new(&device->workaround_bo, device, 4096);
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result = anv_device_alloc_bo(device, 4096, 0, &device->workaround_bo);
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if (result != VK_SUCCESS)
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if (result != VK_SUCCESS)
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goto fail_surface_aux_map_pool;
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goto fail_surface_aux_map_pool;
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if (physical_device->use_softpin)
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result = anv_device_init_trivial_batch(device);
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device->workaround_bo.flags |= EXEC_OBJECT_PINNED;
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if (result != VK_SUCCESS)
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if (!anv_vma_alloc(device, &device->workaround_bo))
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goto fail_workaround_bo;
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goto fail_workaround_bo;
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anv_device_init_trivial_batch(device);
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if (device->info.gen >= 10) {
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result = anv_device_init_hiz_clear_value_bo(device);
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if (device->info.gen >= 10)
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if (result != VK_SUCCESS)
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anv_device_init_hiz_clear_value_bo(device);
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goto fail_trivial_batch_bo;
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}
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anv_scratch_pool_init(device, &device->scratch_pool);
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anv_scratch_pool_init(device, &device->scratch_pool);
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@@ -2694,7 +2683,7 @@ VkResult anv_CreateDevice(
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unreachable("unhandled gen");
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unreachable("unhandled gen");
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}
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}
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if (result != VK_SUCCESS)
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if (result != VK_SUCCESS)
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goto fail_workaround_bo;
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goto fail_queue;
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anv_pipeline_cache_init(&device->default_pipeline_cache, device, true);
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anv_pipeline_cache_init(&device->default_pipeline_cache, device, true);
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@@ -2708,11 +2697,15 @@ VkResult anv_CreateDevice(
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return VK_SUCCESS;
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return VK_SUCCESS;
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fail_workaround_bo:
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fail_queue:
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anv_queue_finish(&device->queue);
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anv_queue_finish(&device->queue);
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anv_scratch_pool_finish(device, &device->scratch_pool);
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anv_scratch_pool_finish(device, &device->scratch_pool);
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anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
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if (device->info.gen >= 10)
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anv_gem_close(device, device->workaround_bo.gem_handle);
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anv_device_release_bo(device, device->hiz_clear_bo);
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fail_trivial_batch_bo:
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anv_device_release_bo(device, device->trivial_batch_bo);
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fail_workaround_bo:
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anv_device_release_bo(device, device->workaround_bo);
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fail_surface_aux_map_pool:
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fail_surface_aux_map_pool:
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if (device->info.gen >= 12) {
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if (device->info.gen >= 12) {
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gen_aux_map_finish(device->aux_map_ctx);
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gen_aux_map_finish(device->aux_map_ctx);
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@@ -2777,14 +2770,10 @@ void anv_DestroyDevice(
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anv_scratch_pool_finish(device, &device->scratch_pool);
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anv_scratch_pool_finish(device, &device->scratch_pool);
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anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
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anv_device_release_bo(device, device->workaround_bo);
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anv_vma_free(device, &device->workaround_bo);
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anv_device_release_bo(device, device->trivial_batch_bo);
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anv_gem_close(device, device->workaround_bo.gem_handle);
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anv_vma_free(device, &device->trivial_batch_bo);
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anv_gem_close(device, device->trivial_batch_bo.gem_handle);
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if (device->info.gen >= 10)
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if (device->info.gen >= 10)
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anv_gem_close(device, device->hiz_clear_bo.gem_handle);
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anv_device_release_bo(device, device->hiz_clear_bo);
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if (device->info.gen >= 12) {
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if (device->info.gen >= 12) {
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gen_aux_map_finish(device->aux_map_ctx);
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gen_aux_map_finish(device->aux_map_ctx);
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@@ -1475,7 +1475,7 @@ anv_image_fill_surface_state(struct anv_device *device,
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if (device->info.gen >= 10 && aux_usage != ISL_AUX_USAGE_NONE) {
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if (device->info.gen >= 10 && aux_usage != ISL_AUX_USAGE_NONE) {
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if (aux_usage == ISL_AUX_USAGE_HIZ) {
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if (aux_usage == ISL_AUX_USAGE_HIZ) {
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clear_address = (struct anv_address) {
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clear_address = (struct anv_address) {
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.bo = &device->hiz_clear_bo,
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.bo = device->hiz_clear_bo,
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.offset = 0,
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.offset = 0,
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};
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};
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} else {
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} else {
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@@ -1175,9 +1175,9 @@ struct anv_device {
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struct anv_state_pool binding_table_pool;
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struct anv_state_pool binding_table_pool;
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struct anv_state_pool surface_state_pool;
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struct anv_state_pool surface_state_pool;
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struct anv_bo workaround_bo;
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struct anv_bo * workaround_bo;
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struct anv_bo trivial_batch_bo;
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struct anv_bo * trivial_batch_bo;
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struct anv_bo hiz_clear_bo;
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struct anv_bo * hiz_clear_bo;
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struct anv_pipeline_cache default_pipeline_cache;
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struct anv_pipeline_cache default_pipeline_cache;
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struct blorp_context blorp;
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struct blorp_context blorp;
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@@ -181,7 +181,7 @@ blorp_get_workaround_page(struct blorp_batch *batch)
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struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
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struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
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return (struct blorp_address) {
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return (struct blorp_address) {
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.buffer = &cmd_buffer->device->workaround_bo,
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.buffer = cmd_buffer->device->workaround_bo,
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};
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};
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}
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}
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#endif
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#endif
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@@ -1909,7 +1909,7 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer)
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if (GEN_GEN == 9 && pipe.VFCacheInvalidationEnable) {
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if (GEN_GEN == 9 && pipe.VFCacheInvalidationEnable) {
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pipe.PostSyncOperation = WriteImmediateData;
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pipe.PostSyncOperation = WriteImmediateData;
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pipe.Address =
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pipe.Address =
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(struct anv_address) { &cmd_buffer->device->workaround_bo, 0 };
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(struct anv_address) { cmd_buffer->device->workaround_bo, 0 };
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}
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}
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}
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}
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@@ -2855,7 +2855,7 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer)
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pc.DepthStallEnable = true;
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pc.DepthStallEnable = true;
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pc.PostSyncOperation = WriteImmediateData;
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pc.PostSyncOperation = WriteImmediateData;
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pc.Address =
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pc.Address =
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(struct anv_address) { &cmd_buffer->device->workaround_bo, 0 };
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(struct anv_address) { cmd_buffer->device->workaround_bo, 0 };
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}
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}
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}
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}
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#endif
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#endif
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@@ -291,7 +291,7 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) {
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anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) {
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pc.DepthStallEnable = true;
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pc.DepthStallEnable = true;
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pc.PostSyncOperation = WriteImmediateData;
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pc.PostSyncOperation = WriteImmediateData;
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pc.Address = (struct anv_address) { &device->workaround_bo, 0 };
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pc.Address = (struct anv_address) { device->workaround_bo, 0 };
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}
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}
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#endif
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#endif
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