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Replace uses of _mesa_bitcount with util_bitcount

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and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem
in nir for platforms that don't have popcount or popcountll, such as
32bit msvc.

v2: - Fix additional uses of _mesa_bitcount added after this was
      originally written

Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v1)
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
This commit is contained in:
Dylan Baker
2018-08-21 09:46:46 -07:00
parent 80825abb5d
commit 8396043f30
36 changed files with 104 additions and 134 deletions
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2
src/compiler/glsl/ir_constant_expression.cpp
View File

@@ -39,7 +39,7 @@
#include "ir.h"
#include "compiler/glsl_types.h"
#include "util/hash_table.h"
#include "main/imports.h"
#include "util/u_math.h"
static float
dot_f(ir_constant *op0, ir_constant *op1)

2
src/compiler/glsl/ir_expression_operation.py
View File

@@ -535,7 +535,7 @@ ir_expression_operation = [
# Bit operations, part of ARB_gpu_shader5.
operation("bitfield_reverse", 1, source_types=(uint_type, int_type), c_expression="bitfield_reverse({src0})"),
operation("bit_count", 1, source_types=(uint_type, int_type), dest_type=int_type, c_expression="_mesa_bitcount({src0})"),
operation("bit_count", 1, source_types=(uint_type, int_type), dest_type=int_type, c_expression="util_bitcount({src0})"),
operation("find_msb", 1, source_types=(uint_type, int_type), dest_type=int_type, c_expression={'u': "find_msb_uint({src0})", 'i': "find_msb_int({src0})"}),
operation("find_lsb", 1, source_types=(uint_type, int_type), dest_type=int_type, c_expression="find_msb_uint({src0} & -{src0})"),

5
src/compiler/glsl/link_varyings.cpp
View File

@@ -38,6 +38,7 @@
#include "link_varyings.h"
#include "main/macros.h"
#include "util/hash_table.h"
#include "util/u_math.h"
#include "program.h"
@@ -2879,13 +2880,13 @@ link_varyings(struct gl_shader_program *prog, unsigned first, unsigned last,
/* This must be done after all dead varyings are eliminated. */
if (sh_i != NULL) {
unsigned slots_used = _mesa_bitcount_64(reserved_out_slots);
unsigned slots_used = util_bitcount64(reserved_out_slots);
if (!check_against_output_limit(ctx, prog, sh_i, slots_used)) {
return false;
}
}
unsigned slots_used = _mesa_bitcount_64(reserved_in_slots);
unsigned slots_used = util_bitcount64(reserved_in_slots);
if (!check_against_input_limit(ctx, prog, sh_next, slots_used))
return false;

9
src/compiler/glsl/linker.cpp
View File

@@ -84,6 +84,7 @@
#include "builtin_functions.h"
#include "shader_cache.h"
#include "util/u_string.h"
#include "util/u_math.h"
#include "main/imports.h"
#include "main/shaderobj.h"
@@ -3013,8 +3014,8 @@ assign_attribute_or_color_locations(void *mem_ctx,
if (target_index == MESA_SHADER_VERTEX) {
unsigned total_attribs_size =
_mesa_bitcount(used_locations & SAFE_MASK_FROM_INDEX(max_index)) +
_mesa_bitcount(double_storage_locations);
util_bitcount(used_locations & SAFE_MASK_FROM_INDEX(max_index)) +
util_bitcount(double_storage_locations);
if (total_attribs_size > max_index) {
linker_error(prog,
"attempt to use %d vertex attribute slots only %d available ",
@@ -3077,8 +3078,8 @@ assign_attribute_or_color_locations(void *mem_ctx,
*/
if (target_index == MESA_SHADER_VERTEX) {
unsigned total_attribs_size =
_mesa_bitcount(used_locations & SAFE_MASK_FROM_INDEX(max_index)) +
_mesa_bitcount(double_storage_locations);
util_bitcount(used_locations & SAFE_MASK_FROM_INDEX(max_index)) +
util_bitcount(double_storage_locations);
if (total_attribs_size > max_index) {
linker_error(prog,
"attempt to use %d vertex attribute slots only %d available ",

6
src/compiler/nir/nir.c
View File

@@ -31,8 +31,8 @@
#include <limits.h>
#include <assert.h>
#include <math.h>
#include "util/u_math.h"
#include "main/imports.h" /* _mesa_bitcount_64 */
#include "main/menums.h" /* BITFIELD64_MASK */
nir_shader *
@@ -1862,7 +1862,7 @@ nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
* the original OpenGL single-slot input numbering. The mapping from old
* locations to new locations is as follows:
*
* new_loc = loc + _mesa_bitcount(dual_slot & BITFIELD64_MASK(loc))
* new_loc = loc + util_bitcount(dual_slot & BITFIELD64_MASK(loc))
*/
void
nir_remap_dual_slot_attributes(nir_shader *shader, uint64_t *dual_slot)
@@ -1879,7 +1879,7 @@ nir_remap_dual_slot_attributes(nir_shader *shader, uint64_t *dual_slot)
nir_foreach_variable(var, &shader->inputs) {
var->data.location +=
_mesa_bitcount_64(*dual_slot & BITFIELD64_MASK(var->data.location));
util_bitcount64(*dual_slot & BITFIELD64_MASK(var->data.location));
}
}

6
src/compiler/nir/nir_split_vars.c
View File

@@ -26,8 +26,8 @@
#include "nir_deref.h"
#include "nir_vla.h"
/* Needed for _mesa_bitcount() */
#include "main/macros.h"
#include "util/u_math.h"
struct split_var_state {
void *mem_ctx;
@@ -1277,7 +1277,7 @@ shrink_vec_var_list(struct exec_list *vars,
}
/* Build the new var type */
unsigned new_num_comps = _mesa_bitcount(usage->comps_kept);
unsigned new_num_comps = util_bitcount(usage->comps_kept);
const struct glsl_type *new_type =
glsl_vector_type(glsl_get_base_type(vec_type), new_num_comps);
for (int i = usage->num_levels - 1; i >= 0; i--) {

7
src/gallium/state_trackers/glx/xlib/glx_api.c
View File

@@ -41,6 +41,7 @@
#include "xm_api.h"
#include "main/imports.h"
#include "main/errors.h"
#include "util/u_math.h"
/* An "Atrribs/Attribs" typo was fixed in glxproto.h in Nov 2014.
* This is in case we don't have the updated header.
@@ -419,9 +420,9 @@ get_visual( Display *dpy, int scr, unsigned int depth, int xclass )
* 10 bits per color channel. Mesa's limited to a max of 8 bits/channel.
*/
if (vis && depth > 24 && (xclass==TrueColor || xclass==DirectColor)) {
if (_mesa_bitcount((GLuint) vis->red_mask ) <= 8 &&
_mesa_bitcount((GLuint) vis->green_mask) <= 8 &&
_mesa_bitcount((GLuint) vis->blue_mask ) <= 8) {
if (util_bitcount((GLuint) vis->red_mask ) <= 8 &&
util_bitcount((GLuint) vis->green_mask) <= 8 &&
util_bitcount((GLuint) vis->blue_mask ) <= 8) {
return vis;
}
else {

11
src/gallium/state_trackers/glx/xlib/xm_api.c
View File

@@ -65,6 +65,7 @@
#include "util/u_atomic.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "hud/hud_context.h"
@@ -825,9 +826,9 @@ XMesaVisual XMesaCreateVisual( Display *display,
{
const int xclass = v->visualType;
if (xclass == GLX_TRUE_COLOR || xclass == GLX_DIRECT_COLOR) {
red_bits = _mesa_bitcount(GET_REDMASK(v));
green_bits = _mesa_bitcount(GET_GREENMASK(v));
blue_bits = _mesa_bitcount(GET_BLUEMASK(v));
red_bits = util_bitcount(GET_REDMASK(v));
green_bits = util_bitcount(GET_GREENMASK(v));
blue_bits = util_bitcount(GET_BLUEMASK(v));
}
else {
/* this is an approximation */
@@ -1180,8 +1181,8 @@ XMesaCreatePixmapTextureBuffer(XMesaVisual v, Pixmap p,
if (ctx->Extensions.ARB_texture_non_power_of_two) {
target = GLX_TEXTURE_2D_EXT;
}
else if ( _mesa_bitcount(b->width) == 1
&& _mesa_bitcount(b->height) == 1) {
else if ( util_bitcount(b->width) == 1
&& util_bitcount(b->height) == 1) {
/* power of two size */
if (b->height == 1) {
target = GLX_TEXTURE_1D_EXT;

1
src/gallium/targets/libgl-xlib/Makefile.am
View File

@@ -62,6 +62,7 @@ lib@GL_LIB@_la_LIBADD = \
$(top_builddir)/src/mapi/glapi/libglapi.la \
$(top_builddir)/src/mesa/libmesagallium.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/util/libmesautil.la \
$(SHARED_GLAPI_LIB) \
$(GL_LIB_DEPS) \
$(CLOCK_LIB) \

5
src/intel/blorp/blorp_blit.c
View File

@@ -29,6 +29,7 @@
#include "util/format_rgb9e5.h"
/* header-only include needed for _mesa_unorm_to_float and friends. */
#include "mesa/main/format_utils.h"
#include "util/u_math.h"
#define FILE_DEBUG_FLAG DEBUG_BLORP
@@ -582,7 +583,7 @@ static inline int count_trailing_one_bits(unsigned value)
#ifdef HAVE___BUILTIN_CTZ
return __builtin_ctz(~value);
#else
return _mesa_bitcount(value & ~(value + 1));
return util_bitcount(value & ~(value + 1));
#endif
}
@@ -634,7 +635,7 @@ blorp_nir_manual_blend_average(nir_builder *b, struct brw_blorp_blit_vars *v,
nir_ssa_def *texture_data[5];
unsigned stack_depth = 0;
for (unsigned i = 0; i < tex_samples; ++i) {
assert(stack_depth == _mesa_bitcount(i)); /* Loop invariant */
assert(stack_depth == util_bitcount(i)); /* Loop invariant */
/* Push sample i onto the stack */
assert(stack_depth < ARRAY_SIZE(texture_data));

3
src/intel/compiler/brw_fs.cpp
View File

@@ -39,6 +39,7 @@
#include "compiler/glsl_types.h"
#include "compiler/nir/nir_builder.h"
#include "program/prog_parameter.h"
#include "util/u_math.h"
using namespace brw;
@@ -1534,7 +1535,7 @@ fs_visitor::calculate_urb_setup()
int urb_next = 0;
/* Figure out where each of the incoming setup attributes lands. */
if (devinfo->gen >= 6) {
if (_mesa_bitcount_64(nir->info.inputs_read &
if (util_bitcount64(nir->info.inputs_read &
BRW_FS_VARYING_INPUT_MASK) <= 16) {
/* The SF/SBE pipeline stage can do arbitrary rearrangement of the
* first 16 varying inputs, so we can put them wherever we want.

3
src/intel/compiler/brw_fs_nir.cpp
View File

@@ -25,6 +25,7 @@
#include "brw_fs.h"
#include "brw_fs_surface_builder.h"
#include "brw_nir.h"
#include "util/u_math.h"
using namespace brw;
using namespace brw::surface_access;
@@ -751,7 +752,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
/* Since NIR is doing the scalarizing for us, we should only ever see
* vectorized operations with a single channel.
*/
assert(_mesa_bitcount(instr->dest.write_mask) == 1);
assert(util_bitcount(instr->dest.write_mask) == 1);
channel = ffs(instr->dest.write_mask) - 1;
result = offset(result, bld, channel);

5
src/intel/compiler/brw_nir.c
View File

@@ -26,6 +26,7 @@
#include "common/gen_debug.h"
#include "compiler/glsl_types.h"
#include "compiler/nir/nir_builder.h"
#include "util/u_math.h"
static bool
is_input(nir_intrinsic_instr *intrin)
@@ -243,7 +244,7 @@ brw_nir_lower_vs_inputs(nir_shader *nir,
BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) |
BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID));
const unsigned num_inputs = _mesa_bitcount_64(nir->info.inputs_read);
const unsigned num_inputs = util_bitcount64(nir->info.inputs_read);
nir_foreach_function(function, nir) {
if (!function->impl)
@@ -322,7 +323,7 @@ brw_nir_lower_vs_inputs(nir_shader *nir,
* before it and counting the bits.
*/
int attr = nir_intrinsic_base(intrin);
int slot = _mesa_bitcount_64(nir->info.inputs_read &
int slot = util_bitcount64(nir->info.inputs_read &
BITFIELD64_MASK(attr));
nir_intrinsic_set_base(intrin, slot);
break;

3
src/intel/compiler/brw_vec4.cpp
View File

@@ -31,6 +31,7 @@
#include "brw_dead_control_flow.h"
#include "common/gen_debug.h"
#include "program/prog_parameter.h"
#include "util/u_math.h"
#define MAX_INSTRUCTION (1 << 30)
@@ -2845,7 +2846,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
((1 << shader->info.cull_distance_array_size) - 1) <<
shader->info.clip_distance_array_size;
unsigned nr_attribute_slots = _mesa_bitcount_64(prog_data->inputs_read);
unsigned nr_attribute_slots = util_bitcount64(prog_data->inputs_read);
/* gl_VertexID and gl_InstanceID are system values, but arrive via an
* incoming vertex attribute. So, add an extra slot.

3
src/intel/compiler/brw_vec4_visitor.cpp
View File

@@ -24,6 +24,7 @@
#include "brw_vec4.h"
#include "brw_cfg.h"
#include "brw_eu.h"
#include "util/u_math.h"
namespace brw {
@@ -1317,7 +1318,7 @@ vec4_visitor::emit_urb_slot(dst_reg reg, int varying)
* determine which edges should be drawn as wireframe.
*/
current_annotation = "edge flag";
int edge_attr = _mesa_bitcount_64(nir->info.inputs_read &
int edge_attr = util_bitcount64(nir->info.inputs_read &
BITFIELD64_MASK(VERT_ATTRIB_EDGEFLAG));
emit(MOV(reg, src_reg(dst_reg(ATTR, edge_attr,
glsl_type::float_type, WRITEMASK_XYZW))));

2
src/intel/vulkan/anv_blorp.c
View File

@@ -296,7 +296,7 @@ void anv_CmdCopyImage(
assert(anv_image_aspects_compatible(src_mask, dst_mask));
if (_mesa_bitcount(src_mask) > 1) {
if (util_bitcount(src_mask) > 1) {
uint32_t aspect_bit;
anv_foreach_image_aspect_bit(aspect_bit, src_image, src_mask) {
struct blorp_surf src_surf, dst_surf;

9
src/intel/vulkan/anv_image.c
View File

@@ -32,6 +32,7 @@
#include "anv_private.h"
#include "util/debug.h"
#include "vk_util.h"
#include "util/u_math.h"
#include "vk_format_info.h"
@@ -814,7 +815,7 @@ anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
assert(image != NULL);
/* The aspect must be exactly one of the image aspects. */
assert(_mesa_bitcount(aspect) == 1 && (aspect & image->aspects));
assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
/* Determine the optimal buffer. */
@@ -942,7 +943,7 @@ anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
const VkImageLayout layout)
{
/* The aspect must be exactly one of the image aspects. */
assert(_mesa_bitcount(aspect) == 1 && (aspect & image->aspects));
assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
@@ -1230,11 +1231,11 @@ static VkImageAspectFlags
remap_aspect_flags(VkImageAspectFlags view_aspects)
{
if (view_aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
if (_mesa_bitcount(view_aspects) == 1)
if (util_bitcount(view_aspects) == 1)
return VK_IMAGE_ASPECT_COLOR_BIT;
VkImageAspectFlags color_aspects = 0;
for (uint32_t i = 0; i < _mesa_bitcount(view_aspects); i++)
for (uint32_t i = 0; i < util_bitcount(view_aspects); i++)
color_aspects |= VK_IMAGE_ASPECT_PLANE_0_BIT << i;
return color_aspects;
}

8
src/intel/vulkan/anv_nir_lower_multiview.c
View File

@@ -57,7 +57,7 @@ build_instance_id(struct lower_multiview_state *state)
*/
state->instance_id =
nir_idiv(b, nir_load_instance_id(b),
nir_imm_int(b, _mesa_bitcount(state->view_mask)));
nir_imm_int(b, util_bitcount(state->view_mask)));
}
return state->instance_id;
@@ -72,7 +72,7 @@ build_view_index(struct lower_multiview_state *state)
b->cursor = nir_before_block(nir_start_block(b->impl));
assert(state->view_mask != 0);
if (_mesa_bitcount(state->view_mask) == 1) {
if (util_bitcount(state->view_mask) == 1) {
/* Set the view index directly. */
state->view_index = nir_imm_int(b, ffs(state->view_mask) - 1);
} else if (state->builder.shader->info.stage == MESA_SHADER_VERTEX) {
@@ -85,7 +85,7 @@ build_view_index(struct lower_multiview_state *state)
*/
nir_ssa_def *compacted =
nir_umod(b, nir_load_instance_id(b),
nir_imm_int(b, _mesa_bitcount(state->view_mask)));
nir_imm_int(b, util_bitcount(state->view_mask)));
if (util_is_power_of_two_or_zero(state->view_mask + 1)) {
/* If we have a full view mask, then compacted is what we want */
@@ -206,7 +206,7 @@ anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask)
/* Unless there is only one possible view index (that would be set
* directly), pass it to the next stage. */
if (_mesa_bitcount(state.view_mask) != 1) {
if (util_bitcount(state.view_mask) != 1) {
nir_variable *view_index_out =
nir_variable_create(shader, nir_var_shader_out,
glsl_int_type(), "view index");

2
src/intel/vulkan/anv_pipeline.c
View File

@@ -364,7 +364,7 @@ populate_wm_prog_key(const struct gen_device_info *devinfo,
key->color_outputs_valid |= (1 << i);
}
key->nr_color_regions = _mesa_bitcount(key->color_outputs_valid);
key->nr_color_regions = util_bitcount(key->color_outputs_valid);
key->replicate_alpha = key->nr_color_regions > 1 &&
ms_info && ms_info->alphaToCoverageEnable;

7
src/intel/vulkan/anv_private.h
View File

@@ -54,6 +54,7 @@
#include "util/set.h"
#include "util/u_atomic.h"
#include "util/u_vector.h"
#include "util/u_math.h"
#include "util/vma.h"
#include "vk_alloc.h"
#include "vk_debug_report.h"
@@ -2557,7 +2558,7 @@ anv_plane_to_aspect(VkImageAspectFlags image_aspects,
uint32_t plane)
{
if (image_aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
if (_mesa_bitcount(image_aspects) > 1)
if (util_bitcount(image_aspects) > 1)
return VK_IMAGE_ASPECT_PLANE_0_BIT << plane;
return VK_IMAGE_ASPECT_COLOR_BIT;
}
@@ -2968,7 +2969,7 @@ anv_image_aspects_compatible(VkImageAspectFlags aspects1,
/* Only 1 color aspects are compatibles. */
if ((aspects1 & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) != 0 &&
(aspects2 & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) != 0 &&
_mesa_bitcount(aspects1) == _mesa_bitcount(aspects2))
util_bitcount(aspects1) == util_bitcount(aspects2))
return true;
return false;
@@ -3179,7 +3180,7 @@ struct anv_subpass {
static inline unsigned
anv_subpass_view_count(const struct anv_subpass *subpass)
{
return MAX2(1, _mesa_bitcount(subpass->view_mask));
return MAX2(1, util_bitcount(subpass->view_mask));
}
struct anv_render_pass_attachment {

4
src/intel/vulkan/genX_cmd_buffer.c
View File

@@ -787,7 +787,7 @@ genX(cmd_buffer_mark_image_written)(struct anv_cmd_buffer *cmd_buffer,
uint32_t layer_count)
{
/* The aspect must be exactly one of the image aspects. */
assert(_mesa_bitcount(aspect) == 1 && (aspect & image->aspects));
assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
/* The only compression types with more than just fast-clears are MCS,
* CCS_E, and HiZ. With HiZ we just trust the layout and don't actually
@@ -1859,7 +1859,7 @@ cmd_buffer_alloc_push_constants(struct anv_cmd_buffer *cmd_buffer)
#endif
const unsigned num_stages =
_mesa_bitcount(stages & VK_SHADER_STAGE_ALL_GRAPHICS);
util_bitcount(stages & VK_SHADER_STAGE_ALL_GRAPHICS);
unsigned size_per_stage = push_constant_kb / num_stages;
/* Broadwell+ and Haswell gt3 require that the push constant sizes be in

14
src/intel/vulkan/genX_query.c
View File

@@ -70,7 +70,7 @@ VkResult genX(CreateQueryPool)(
pipeline_statistics &= ANV_PIPELINE_STATISTICS_MASK;
/* Statistics queries have a min and max for every statistic */
uint64s_per_slot += 2 * _mesa_bitcount(pipeline_statistics);
uint64s_per_slot += 2 * util_bitcount(pipeline_statistics);
break;
default:
assert(!"Invalid query type");
@@ -272,7 +272,7 @@ VkResult genX(GetQueryPoolResults)(
idx++;
}
assert(idx == _mesa_bitcount(pool->pipeline_statistics));
assert(idx == util_bitcount(pool->pipeline_statistics));
break;
}
@@ -289,7 +289,7 @@ VkResult genX(GetQueryPoolResults)(
if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
uint32_t idx = (pool->type == VK_QUERY_TYPE_PIPELINE_STATISTICS) ?
_mesa_bitcount(pool->pipeline_statistics) : 1;
util_bitcount(pool->pipeline_statistics) : 1;
cpu_write_query_result(pData, flags, idx, available);
}
@@ -489,7 +489,7 @@ void genX(CmdEndQuery)(
*/
if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask) {
const uint32_t num_queries =
_mesa_bitcount(cmd_buffer->state.subpass->view_mask);
util_bitcount(cmd_buffer->state.subpass->view_mask);
if (num_queries > 1)
emit_zero_queries(cmd_buffer, pool, query + 1, num_queries - 1);
}
@@ -546,7 +546,7 @@ void genX(CmdWriteTimestamp)(
*/
if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask) {
const uint32_t num_queries =
_mesa_bitcount(cmd_buffer->state.subpass->view_mask);
util_bitcount(cmd_buffer->state.subpass->view_mask);
if (num_queries > 1)
emit_zero_queries(cmd_buffer, pool, query + 1, num_queries - 1);
}
@@ -778,7 +778,7 @@ void genX(CmdCopyQueryPoolResults)(
idx++;
}
assert(idx == _mesa_bitcount(pool->pipeline_statistics));
assert(idx == util_bitcount(pool->pipeline_statistics));
break;
}
@@ -795,7 +795,7 @@ void genX(CmdCopyQueryPoolResults)(
if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
uint32_t idx = (pool->type == VK_QUERY_TYPE_PIPELINE_STATISTICS) ?
_mesa_bitcount(pool->pipeline_statistics) : 1;
util_bitcount(pool->pipeline_statistics) : 1;
emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(0),
&pool->bo, slot_offset);

5
src/mesa/drivers/common/meta.c
View File

@@ -88,6 +88,7 @@
#include "util/bitscan.h"
#include "util/ralloc.h"
#include "compiler/nir/nir.h"
#include "util/u_math.h"
/** Return offset in bytes of the field within a vertex struct */
#define OFFSET(FIELD) ((void *) offsetof(struct vertex, FIELD))
@@ -1611,7 +1612,7 @@ _mesa_meta_drawbuffers_from_bitfield(GLbitfield bits)
assert((bits & ~BUFFER_BITS_COLOR) == 0);
/* Make sure we don't overflow any arrays. */
assert(_mesa_bitcount(bits) <= MAX_DRAW_BUFFERS);
assert(util_bitcount(bits) <= MAX_DRAW_BUFFERS);
enums[0] = GL_NONE;
@@ -1651,7 +1652,7 @@ _mesa_meta_drawbuffers_and_colormask(struct gl_context *ctx, GLbitfield mask)
assert((mask & ~BUFFER_BITS_COLOR) == 0);
/* Make sure we don't overflow any arrays. */
assert(_mesa_bitcount(mask) <= MAX_DRAW_BUFFERS);
assert(util_bitcount(mask) <= MAX_DRAW_BUFFERS);
enums[0] = GL_NONE;

3
src/mesa/drivers/dri/i965/brw_curbe.c
View File

@@ -64,6 +64,7 @@
#include "brw_defines.h"
#include "brw_state.h"
#include "brw_util.h"
#include "util/u_math.h"
/**
@@ -86,7 +87,7 @@ static void calculate_curbe_offsets( struct brw_context *brw )
/* _NEW_TRANSFORM */
if (ctx->Transform.ClipPlanesEnabled) {
GLuint nr_planes = 6 + _mesa_bitcount(ctx->Transform.ClipPlanesEnabled);
GLuint nr_planes = 6 + util_bitcount(ctx->Transform.ClipPlanesEnabled);
nr_clip_regs = (nr_planes * 4 + 15) / 16;
}

5
src/mesa/drivers/dri/i965/brw_performance_query.c
View File

@@ -67,6 +67,7 @@
#include "util/ralloc.h"
#include "util/hash_table.h"
#include "util/list.h"
#include "util/u_math.h"
#include "brw_context.h"
#include "brw_defines.h"
@@ -1985,11 +1986,11 @@ compute_topology_builtins(struct brw_context *brw)
for (int i = 0; i < sizeof(devinfo->subslice_masks[i]); i++) {
brw->perfquery.sys_vars.n_eu_sub_slices +=
_mesa_bitcount(devinfo->subslice_masks[i]);
util_bitcount(devinfo->subslice_masks[i]);
}
for (int i = 0; i < sizeof(devinfo->eu_masks); i++)
brw->perfquery.sys_vars.n_eus += _mesa_bitcount(devinfo->eu_masks[i]);
brw->perfquery.sys_vars.n_eus += util_bitcount(devinfo->eu_masks[i]);
brw->perfquery.sys_vars.eu_threads_count =
brw->perfquery.sys_vars.n_eus * devinfo->num_thread_per_eu;

7
src/mesa/drivers/dri/i965/brw_wm.c
View File

@@ -40,6 +40,7 @@
#include "brw_program.h"
#include "util/ralloc.h"
#include "util/u_math.h"
static void
assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
@@ -559,7 +560,7 @@ brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
}
/* BRW_NEW_VUE_MAP_GEOM_OUT */
if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
if (devinfo->gen < 6 || util_bitcount64(prog->info.inputs_read &
BRW_FS_VARYING_INPUT_MASK) > 16) {
key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
}
@@ -632,14 +633,14 @@ brw_wm_populate_default_key(const struct gen_device_info *devinfo,
key->iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
}
if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
if (devinfo->gen < 6 || util_bitcount64(prog->info.inputs_read &
BRW_FS_VARYING_INPUT_MASK) > 16) {
key->input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
}
brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
key->nr_color_regions = _mesa_bitcount_64(outputs_written &
key->nr_color_regions = util_bitcount64(outputs_written &
~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));

1
src/mesa/drivers/x11/Makefile.am
View File

@@ -68,6 +68,7 @@ GL_PATCH = 0
lib@GL_LIB@_la_LIBADD = \
$(top_builddir)/src/mesa/libmesa.la \
$(top_builddir)/src/mapi/glapi/libglapi.la \
$(top_builddir)/src/util/libmesautil.la \
$(SHARED_GLAPI_LIB) \
$(GL_LIB_DEPS)

7
src/mesa/drivers/x11/fakeglx.c
View File

@@ -52,6 +52,7 @@
#include "main/version.h"
#include "xfonts.h"
#include "xmesaP.h"
#include "util/u_math.h"
/* This indicates the client-side GLX API and GLX encoder version. */
#define CLIENT_MAJOR_VERSION 1
@@ -510,9 +511,9 @@ get_visual( Display *dpy, int scr, unsigned int depth, int xclass )
* 10 bits per color channel. Mesa's limited to a max of 8 bits/channel.
*/
if (vis && depth > 24 && (xclass==TrueColor || xclass==DirectColor)) {
if (_mesa_bitcount((GLuint) vis->red_mask ) <= 8 &&
_mesa_bitcount((GLuint) vis->green_mask) <= 8 &&
_mesa_bitcount((GLuint) vis->blue_mask ) <= 8) {
if (util_bitcount((GLuint) vis->red_mask ) <= 8 &&
util_bitcount((GLuint) vis->green_mask) <= 8 &&
util_bitcount((GLuint) vis->blue_mask ) <= 8) {
return vis;
}
else {

2
src/mesa/drivers/x11/meson.build
View File

@@ -32,7 +32,7 @@ libgl = shared_library(
include_directories : [
inc_include, inc_src, inc_mesa, inc_mapi, inc_gallium, inc_gallium_aux
],
link_with : [libmesa_classic, libglapi_static, gl_link_with],
link_with : [libmesa_classic, libglapi_static, libmesa_util, gl_link_with],
dependencies : [dep_x11, dep_xext, dep_xcb, dep_thread],
version : '1.6.0',
install : true,

17
src/mesa/drivers/x11/xm_api.c
View File

@@ -84,6 +84,7 @@
#include "tnl/t_pipeline.h"
#include "drivers/common/driverfuncs.h"
#include "drivers/common/meta.h"
#include "util/u_math.h"
/**
* Global X driver lock
@@ -463,9 +464,9 @@ setup_truecolor(XMesaVisual v, XMesaBuffer buffer, XMesaColormap cmap)
3*16, 11*16, 1*16, 9*16,
15*16, 7*16, 13*16, 5*16,
};
GLint rBits = _mesa_bitcount(rmask);
GLint gBits = _mesa_bitcount(gmask);
GLint bBits = _mesa_bitcount(bmask);
GLint rBits = util_bitcount(rmask);
GLint gBits = util_bitcount(gmask);
GLint bBits = util_bitcount(bmask);
GLint maxBits;
GLuint i;
@@ -828,9 +829,9 @@ XMesaVisual XMesaCreateVisual( XMesaDisplay *display,
{
const int xclass = v->visualType;
if (xclass == GLX_TRUE_COLOR || xclass == GLX_DIRECT_COLOR) {
red_bits = _mesa_bitcount(GET_REDMASK(v));
green_bits = _mesa_bitcount(GET_GREENMASK(v));
blue_bits = _mesa_bitcount(GET_BLUEMASK(v));
red_bits = util_bitcount(GET_REDMASK(v));
green_bits = util_bitcount(GET_GREENMASK(v));
blue_bits = util_bitcount(GET_BLUEMASK(v));
}
else {
/* this is an approximation */
@@ -1095,8 +1096,8 @@ XMesaCreatePixmapTextureBuffer(XMesaVisual v, XMesaPixmap p,
if (ctx->Extensions.ARB_texture_non_power_of_two) {
target = GLX_TEXTURE_2D_EXT;
}
else if ( _mesa_bitcount(width) == 1
&& _mesa_bitcount(height) == 1) {
else if ( util_bitcount(width) == 1
&& util_bitcount(height) == 1) {
/* power of two size */
if (height == 1) {
target = GLX_TEXTURE_1D_EXT;

5
src/mesa/main/arrayobj.c
View File

@@ -53,6 +53,7 @@
#include "varray.h"
#include "util/bitscan.h"
#include "util/u_atomic.h"
#include "util/u_math.h"
const GLubyte
@@ -755,7 +756,7 @@ _mesa_update_vao_derived_arrays(struct gl_context *ctx,
* grouping information in a seperate array beside
* gl_array_attributes/gl_vertex_buffer_binding.
*/
assert(_mesa_bitcount(binding->_BoundArrays & vao->_Enabled) == 1
assert(util_bitcount(binding->_BoundArrays & vao->_Enabled) == 1
|| (vao->_Enabled & ~binding->_BoundArrays) == 0);
/* Start this current effective binding with the array */
@@ -775,7 +776,7 @@ _mesa_update_vao_derived_arrays(struct gl_context *ctx,
&vao->BufferBinding[attrib2->BufferBindingIndex];
/* See the comment at the same assert above. */
assert(_mesa_bitcount(binding2->_BoundArrays & vao->_Enabled) == 1
assert(util_bitcount(binding2->_BoundArrays & vao->_Enabled) == 1
|| (vao->_Enabled & ~binding->_BoundArrays) == 0);
/* Check if we have an identical binding */

7
src/mesa/main/buffers.c
View File

@@ -37,6 +37,7 @@
#include "fbobject.h"
#include "mtypes.h"
#include "util/bitscan.h"
#include "util/u_math.h"
#define BAD_MASK ~0u
@@ -468,7 +469,7 @@ draw_buffers(struct gl_context *ctx, struct gl_framebuffer *fb, GLsizei n,
* For OpenGL 4.x we check that behaviour. For any previous version we
* keep considering it wrong (as INVALID_ENUM).
*/
if (_mesa_bitcount(destMask[output]) > 1) {
if (util_bitcount(destMask[output]) > 1) {
if (_mesa_is_winsys_fbo(fb) && ctx->Version >= 40 &&
buffers[output] == GL_BACK) {
if (n != 1) {
@@ -722,7 +723,7 @@ _mesa_drawbuffers(struct gl_context *ctx, struct gl_framebuffer *fb,
* (ex: glDrawBuffer(GL_FRONT_AND_BACK)).
* Otherwise, destMask[x] can only have one bit set.
*/
if (n > 0 && _mesa_bitcount(destMask[0]) > 1) {
if (n > 0 && util_bitcount(destMask[0]) > 1) {
GLuint count = 0, destMask0 = destMask[0];
while (destMask0) {
const gl_buffer_index bufIndex = u_bit_scan(&destMask0);
@@ -741,7 +742,7 @@ _mesa_drawbuffers(struct gl_context *ctx, struct gl_framebuffer *fb,
if (destMask[buf]) {
gl_buffer_index bufIndex = ffs(destMask[buf]) - 1;
/* only one bit should be set in the destMask[buf] field */
assert(_mesa_bitcount(destMask[buf]) == 1);
assert(util_bitcount(destMask[buf]) == 1);
if (fb->_ColorDrawBufferIndexes[buf] != bufIndex) {
updated_drawbuffers(ctx, fb);
fb->_ColorDrawBufferIndexes[buf] = bufIndex;

38
src/mesa/main/imports.c
View File

@@ -213,44 +213,6 @@ _mesa_align_realloc(void *oldBuffer, size_t oldSize, size_t newSize,
/*@}*/
/**********************************************************************/
/** \name Math */
/*@{*/
#ifndef HAVE___BUILTIN_POPCOUNT
/**
* Return number of bits set in given GLuint.
*/
unsigned int
_mesa_bitcount(unsigned int n)
{
unsigned int bits;
for (bits = 0; n > 0; n = n >> 1) {
bits += (n & 1);
}
return bits;
}
#endif
#ifndef HAVE___BUILTIN_POPCOUNTLL
/**
* Return number of bits set in given 64-bit uint.
*/
unsigned int
_mesa_bitcount_64(uint64_t n)
{
unsigned int bits;
for (bits = 0; n > 0; n = n >> 1) {
bits += (n & 1);
}
return bits;
}
#endif
/*@}*/
/** Needed due to #ifdef's, above. */
int
_mesa_vsnprintf(char *str, size_t size, const char *fmt, va_list args)

15
src/mesa/main/imports.h
View File

@@ -317,21 +317,6 @@ extern void *
_mesa_align_realloc(void *oldBuffer, size_t oldSize, size_t newSize,
unsigned long alignment);
#ifdef HAVE___BUILTIN_POPCOUNT
#define _mesa_bitcount(i) __builtin_popcount(i)
#else
extern unsigned int
_mesa_bitcount(unsigned int n);
#endif
#ifdef HAVE___BUILTIN_POPCOUNTLL
#define _mesa_bitcount_64(i) __builtin_popcountll(i)
#else
extern unsigned int
_mesa_bitcount_64(uint64_t n);
#endif
extern int
_mesa_snprintf( char *str, size_t size, const char *fmt, ... ) PRINTFLIKE(3, 4);

4
src/mesa/program/program_parse.y
View File

@@ -39,6 +39,8 @@
#include "program/symbol_table.h"
#include "program/program_parser.h"
#include "util/u_math.h"
extern void *yy_scan_string(char *);
extern void yy_delete_buffer(void *);
@@ -2607,7 +2609,7 @@ _mesa_parse_arb_program(struct gl_context *ctx, GLenum target, const GLubyte *st
state->prog->arb.NumParameters = state->prog->Parameters->NumParameters;
state->prog->arb.NumAttributes =
_mesa_bitcount_64(state->prog->info.inputs_read);
util_bitcount64(state->prog->info.inputs_read);
/*
* Initialize native counts to logical counts. The device driver may

5
src/mesa/state_tracker/st_glsl_to_nir.cpp
View File

@@ -32,7 +32,6 @@
#include "program/prog_parameter.h"
#include "program/ir_to_mesa.h"
#include "main/mtypes.h"
#include "main/imports.h"
#include "main/errors.h"
#include "main/shaderapi.h"
#include "main/uniforms.h"
@@ -91,10 +90,10 @@ st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
*/
if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
/* bit of a hack, mirroring st_translate_vertex_program */
var->data.driver_location = _mesa_bitcount_64(nir->info.inputs_read);
var->data.driver_location = util_bitcount64(nir->info.inputs_read);
} else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
var->data.driver_location =
_mesa_bitcount_64(nir->info.inputs_read &
util_bitcount64(nir->info.inputs_read &
BITFIELD64_MASK(var->data.location));
nir->num_inputs++;
} else {