anv: prepare pipeline for delayed emission of color writes
Namely we want to be able to emit the following dynamically : * On Gfx 7/7.5 : 3DSTATE_VM, 3DSTATE_BLEND_STATE_POINTERS * On Gfx 8+ : 3DSTATE_VM, 3DSTATE_BLEND_STATE_POINTERS, 3DSTATE_PS_BLEND Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
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@@ -2239,6 +2239,7 @@ enum anv_cmd_dirty_bits {
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ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE = 1 << 22, /* VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE_EXT */
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ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP = 1 << 23, /* VK_DYNAMIC_STATE_STENCIL_OP_EXT */
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ANV_CMD_DIRTY_DYNAMIC_SAMPLE_LOCATIONS = 1 << 24, /* VK_DYNAMIC_STATE_SAMPLE_LOCATIONS_EXT */
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ANV_CMD_DIRTY_DYNAMIC_COLOR_BLEND_STATE = 1 << 25, /* VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT */
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};
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typedef uint32_t anv_cmd_dirty_mask_t;
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@@ -3369,6 +3370,7 @@ struct anv_graphics_pipeline {
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bool sample_shading_enable;
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bool kill_pixel;
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bool depth_bounds_test_enable;
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bool force_fragment_thread_dispatch;
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/* When primitive replication is used, subpass->view_mask will describe what
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* views to replicate.
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@@ -3389,12 +3391,17 @@ struct anv_graphics_pipeline {
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uint32_t depth_stencil_state[3];
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uint32_t clip[4];
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uint32_t xfb_bo_pitch[4];
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uint32_t wm[3];
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uint32_t blend_state[MAX_RTS * 2];
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} gfx7;
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struct {
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uint32_t sf[4];
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uint32_t raster[5];
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uint32_t wm_depth_stencil[3];
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uint32_t wm[2];
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uint32_t ps_blend[2];
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uint32_t blend_state[1 + MAX_RTS * 2];
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} gfx8;
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struct {
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