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glsl: Add a lowering pass for 64-bit integer division

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Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Ian Romanick
2016-10-17 17:55:18 -07:00
parent 012f2995c3
commit 82c31f3eb9
2 changed files with 12 additions and 0 deletions
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1
src/compiler/glsl/ir_optimization.h
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@@ -53,6 +53,7 @@
/* Opertaions for lower_64bit_integer_instructions() */ /* Opertaions for lower_64bit_integer_instructions() */
#define MUL64 (1U << 0) #define MUL64 (1U << 0)
#define SIGN64 (1U << 1) #define SIGN64 (1U << 1)
#define DIV64 (1U << 2)
/** /**
* \see class lower_packing_builtins_visitor * \see class lower_packing_builtins_visitor

11
src/compiler/glsl/lower_int64.cpp
View File

@@ -368,6 +368,17 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
} }
break; break;
case ir_binop_div:
if (lowering(DIV64)) {
if (ir->type->base_type == GLSL_TYPE_UINT64) {
*rvalue = handle_op(ir, "__builtin_udiv64", generate_ir::udiv64);
} else {
*rvalue = handle_op(ir, "__builtin_idiv64", generate_ir::idiv64);
}
this->progress = true;
}
break;
case ir_binop_mul: case ir_binop_mul:
if (lowering(MUL64)) { if (lowering(MUL64)) {
*rvalue = handle_op(ir, "__builtin_umul64", generate_ir::umul64); *rvalue = handle_op(ir, "__builtin_umul64", generate_ir::umul64);