From 82b22e7fb931b56d80636654c36f58b9d013101e Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Wed, 5 Oct 2022 09:50:02 +0200 Subject: [PATCH] r600/sfn: Only run 64 bit ops lowering passes when really needed If the shader doesn't do 64 bit then there is no need to run these lowering passes. Signed-off-by: Gert Wollny Part-of: --- src/gallium/drivers/r600/sfn/sfn_nir.cpp | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/src/gallium/drivers/r600/sfn/sfn_nir.cpp index 6bd30437bd1..9a142415e57 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir.cpp @@ -759,17 +759,21 @@ int r600_shader_from_nir(struct r600_context *rctx, NIR_PASS_V(sh, r600::r600_nir_lower_tex_to_backend, rctx->b.gfx_level); - NIR_PASS_V(sh, r600::r600_nir_split_64bit_io); - NIR_PASS_V(sh, r600::r600_split_64bit_alu_and_phi); - NIR_PASS_V(sh, nir_split_64bit_vec3_and_vec4); - NIR_PASS_V(sh, nir_lower_int64); + if ((sh->info.bit_sizes_float | sh->info.bit_sizes_int) & 64) { + NIR_PASS_V(sh, r600::r600_nir_split_64bit_io); + NIR_PASS_V(sh, r600::r600_split_64bit_alu_and_phi); + NIR_PASS_V(sh, nir_split_64bit_vec3_and_vec4); + NIR_PASS_V(sh, nir_lower_int64); + } NIR_PASS_V(sh, nir_lower_ubo_vec4); if (lower_64bit) NIR_PASS_V(sh, r600::r600_nir_64_to_vec2); - NIR_PASS_V(sh, r600::r600_split_64bit_uniforms_and_ubo); + if ((sh->info.bit_sizes_float | sh->info.bit_sizes_int) & 64) + NIR_PASS_V(sh, r600::r600_split_64bit_uniforms_and_ubo); + /* Lower to scalar to let some optimization work out better */ while(optimize_once(sh));